Wiring board for fingerprint sensor

• US 10,089,513 B2
• Filed: 05/25/2017
• Issued: 10/02/2018
• Est. Priority Date: 05/30/2016
• Status: Active Grant

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Corporation
• Inventors: Banba, Yudai, Noguchi, Sumiko
• Primary Examiner(s): Seth, Manav
• Application Number:
  US15/604,926
• Publication Number:
  US 20170344790A1
• Time in Patent Office: 495 Days
• CPC Class Codes: G06V 10/147 Details of sensors, e.g. sensor lenses fingerprint or palmprint sensors G06V40/13; vascular sensors G06V40/145; eye sensors G06V40/19
• CPC Class Codes: G06V 40/1318 using electro-optical elements or layers, e.g. electroluminescent sensing
• CPC Class Codes: H05K 1/111 Pads for surface mounting, e.g. lay-out
• CPC Class Codes: H05K 1/112 directly combined with via connections
• CPC Class Codes: H05K 2201/094 Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
• CPC Class Codes: H05K 2201/09609 Via grid, i.e. two-dimensional array of vias or holes in a single plane
• CPC Class Codes: H05K 2201/098 Special shape of the cross-section of conductors, e.g. very thick plated conductors
• CPC Class Codes: H05K 2201/10053 Switch
• CPC Class Codes: H05K 2201/10151 Sensor
• CPC Class Codes: H05K 3/007 Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier H05K1/187, H05K3/20 and H05K3/4682 take precedence
• CPC Class Codes: H05K 3/28 Applying non-metallic protective coatings H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673
• CPC Class Codes: H05K 3/4644 by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602

Abstract

A wiring board for a fingerprint sensor includes an insulating board including insulating layers; outer strip electrodes disposed on the insulating layer in an uppermost layer, and side by side in a first direction; inner strip electrodes disposed on the insulating layer in a next layer contacting the insulating layer in the uppermost layer, and side by side in a second direction orthogonal to the first direction; a pad electrode disposed on the insulating layer in the uppermost layer, and on the inner strip electrodes and between the outer strip electrodes; and a via conductor extending through the insulating layer in an outermost layer between the pad electrode and the inner strip electrodes and electrically connecting the pad electrode and the inner strip electrodes to each other. The via conductor has an elliptical shape that is long in the first direction in top view.

Claims

1. A wiring board for a fingerprint sensor, comprising:

an insulating board that comprises a plurality of insulating layers laminated on each other;

a plurality of outer strip electrodes for reading a fingerprint, the plurality of outer strip electrodes being disposed on the insulating layer in an uppermost layer and being disposed side by side in a first direction;

a plurality of inner strip electrodes for reading the fingerprint, the plurality of inner strip electrodes being disposed on the insulating layer in a next layer that contacts the insulating layer in the uppermost layer and being disposed side by side in a second direction orthogonal to the first direction;

a pad electrode that is disposed on the insulating layer in the uppermost layer and that is disposed on the inner strip electrodes and between the outer strip electrodes; and

a via conductor that extends through the insulating layer in an outermost layer between the pad electrode and the inner strip electrodes and that electrically connects the pad electrode and the inner strip electrodes to each other,

wherein the via conductor has an elliptical shape that is long in the first direction in top view.

2. The wiring board according to claim 1, wherein the outer strip electrodes and the pad electrode are embedded in an upper surface of the insulating layer in the uppermost layer, and

wherein the insulating layer, the outer strip electrodes, and the pad electrode are covered by a solder resist layer having a flat surface.

3. The wiring board according to claim 2, wherein the outer strip electrodes and the pad electrode are embedded in the upper surface of the insulating layer in the uppermost layer with upper surfaces of the outer strip electrodes and an upper surface of the pad electrode being 0.1 μ

m to 3 μ

m below the upper surface of the insulating layer in the uppermost layer, and

wherein a thickness of the solder resist layer that covers the upper surfaces of the outer strip electrodes and the upper surface of the pad electrode is 6 μ

m or less.