Gate driver for switching converter having body diode power loss minimization
First Claim
1. A method involving a high-side transistor and a low-side transistor, wherein a source of the high-side transistor is coupled to a drain of the low-side transistor at a node, wherein a diode is disposed in parallel with the high-side transistor, the method comprising:
- (a) receiving a high-side driver digital control signal, wherein the high-side driver digital control signal has a first digital logic value;
(b) in response to receiving the high-side driver digital control signal of the first digital logic value in (a) driving a high-side (HS) gate signal onto a gate of the high-side transistor such that the high-side transistor is controlled to be off;
(c) determining that a current flow through the diode rises and exceeds a threshold current, wherein the determining of (c) occurs when the high-side driver digital control signal is at the first digital logic value;
(d) in response to the determining of (c) driving the HS gate signal onto the gate of the high-side transistor such that the high-side transistor turns on;
(e) receiving a low-side driver digital control signal, wherein the low-side driver digital control signal has the first digital logic value;
(f) detecting that the low-side driver digital control signal transitions from the first digital logic value to a second digital logic value, wherein the low-side driver digital control signal transitions from the first digital logic value to the second digital logic value in (f) after the determining of (c);
(g) in response to the detecting of (f) driving the HS gate signal onto the gate of the high-side transistor such that the high-side transistor is turned off;
(h) determining that a gate-to-source voltage of the high-side transistor has dropped below a threshold voltage, wherein the gate-to-source voltage of the high-side transistor drops below the threshold voltage in (h) in response to the driving of the HS gate signal in (g);
(i) in response to the determining of (h) driving a low-side (LS) gate signal onto a gate of the low-side transistor such that the low side transistor is controlled to turn on; and
(j) driving the LS gate signal onto the gate of the low-side transistor such that the low side transistor remains on as long as the low-side driver digital control signal remains at the second digital logic value, wherein the high-side driver digital control signal remains at the first digital logic value and does not transition digital values to a second digital logic value at any time during steps (c) through (j).
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Accused Products
Abstract
In a switching converter having an inductive load, a current may flow through the body diode of a transistor even though the gate of the transistor is being controlled to keep the transistor off. Then when the other transistor of the switch leg is turned on, a reverse recovery current flows in the reverse direction through the body diode. To reduce switching losses associated with such current flows, a gate driver integrated circuit detects when current flow through the body diode rises above a threshold current. The gate driver integrated circuit then controls the transistor to turn on. Then when the other transistor of the switch leg is made to turn on, the gate driver first turns the transistor off. When the gate-to-source voltage of the turning off transistor drops below a threshold voltage, then the gate driver integrated circuit allows and controls the other transistor to turn on.
12 Citations
23 Claims
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1. A method involving a high-side transistor and a low-side transistor, wherein a source of the high-side transistor is coupled to a drain of the low-side transistor at a node, wherein a diode is disposed in parallel with the high-side transistor, the method comprising:
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(a) receiving a high-side driver digital control signal, wherein the high-side driver digital control signal has a first digital logic value; (b) in response to receiving the high-side driver digital control signal of the first digital logic value in (a) driving a high-side (HS) gate signal onto a gate of the high-side transistor such that the high-side transistor is controlled to be off; (c) determining that a current flow through the diode rises and exceeds a threshold current, wherein the determining of (c) occurs when the high-side driver digital control signal is at the first digital logic value; (d) in response to the determining of (c) driving the HS gate signal onto the gate of the high-side transistor such that the high-side transistor turns on; (e) receiving a low-side driver digital control signal, wherein the low-side driver digital control signal has the first digital logic value; (f) detecting that the low-side driver digital control signal transitions from the first digital logic value to a second digital logic value, wherein the low-side driver digital control signal transitions from the first digital logic value to the second digital logic value in (f) after the determining of (c); (g) in response to the detecting of (f) driving the HS gate signal onto the gate of the high-side transistor such that the high-side transistor is turned off; (h) determining that a gate-to-source voltage of the high-side transistor has dropped below a threshold voltage, wherein the gate-to-source voltage of the high-side transistor drops below the threshold voltage in (h) in response to the driving of the HS gate signal in (g); (i) in response to the determining of (h) driving a low-side (LS) gate signal onto a gate of the low-side transistor such that the low side transistor is controlled to turn on; and (j) driving the LS gate signal onto the gate of the low-side transistor such that the low side transistor remains on as long as the low-side driver digital control signal remains at the second digital logic value, wherein the high-side driver digital control signal remains at the first digital logic value and does not transition digital values to a second digital logic value at any time during steps (c) through (j). - View Dependent Claims (2, 3, 4, 5)
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6. A gate driver integrated circuit comprising:
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a high-side driver digital control signal input terminal; a high-side driver output terminal; a high-side gate driver circuit that outputs a high-side gate driver output signal onto the high-side driver output terminal; a low-side driver digital control signal input terminal; a low-side driver output terminal; a low-side gate driver circuit that outputs a low-side gate driver output signal onto the low-side driver output terminal; a high-side current sense input terminal; a high-side voltage sense input terminal; a low-side current sense input terminal; a low-side voltage sense input terminal; a high-side driver logic circuit that supplies a control signal to the high-side gate driver circuit and that receives a high-side driver digital control signal from the high-side driver digital control signal input terminal; a low-side driver logic circuit that supplies a control signal to the low-side gate driver circuit and that receives a low-side driver digital control signal from the low-side driver digital control signal input terminal; a high-side current sense circuit that receives a signal from the high-side current sense input terminal and that supplies a signal to the high-side driver logic circuit; a high-side voltage sense circuit that receives a signal from the high-side voltage sense input terminal and that supplies a signal to the low-side driver logic circuit; a low-side current sense circuit that receives a signal from the low-side current sense input terminal and that supplies a signal to the low-side driver logic circuit; and a low-side voltage sense circuit that receives a signal from the low-side voltage sense input terminal and that supplies a signal to the high-side driver logic circuit, and wherein the gate driver integrated circuit does not include any digital processor that fetches and executes instructions. - View Dependent Claims (7, 8)
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9. A gate driver integrated circuit adapted for driving a low-side gate signal onto a gate of a low-side transistor and for driving a high-side gate signal onto a gate of a high-side transistor, wherein the high-side transistor has a body diode, the gate driver integrated circuit comprising:
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a high-side driver digital control signal input terminal; a high-side driver output terminal; a high-side gate driver circuit that outputs a high-side gate driver output signal onto the high-side driver output terminal; a low-side driver digital control signal input terminal; a low-side driver output terminal; a low-side gate driver circuit that outputs the low-side gate driver output signal onto the low-side driver output terminal; body diode current flow monitoring means for determining when a current flow through the body diode of the high-side transistor rises above a predetermined threshold current during a time when the high-side gate driver circuit is controlling the high-side transistor to be off, and for causing the high-side transistor in response to the determining to be turned on; high-side driver logic means for detecting a transition of a low-side driver digital control signal on the low-side driver digital control signal input terminal during a time when the high-side transistor is turned on and for in response causing the high-side transistor to be turned off; and VGs monitoring means for detecting when a gate-to-source voltage on the high-side transistor has fallen below a predetermined threshold voltage and in response for causing the low-side gate driver circuit to cause the low-side transistor to be turned on. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A gate driver integrated circuit adapted for driving a low-side gate signal onto a gate of a low-side transistor and for driving a high-side gate signal onto a gate of a high-side transistor, wherein the high-side transistor has a body diode, the gate driver integrated circuit comprising:
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a high-side driver digital control signal input terminal; a high-side driver output terminal; a high-side gate driver circuit that outputs a high-side gate driver output signal onto the high-side driver output terminal, wherein the high-side gate driver circuit drives the gate of the high-side transistor so as to turn the high-side transistor on if a digital signal of a predetermined digital logic value is present on the high-side driver digital control signal input terminal; a low-side driver digital control signal input terminal; a low-side driver output terminal; a low-side gate driver circuit that outputs a low-side gate driver output signal onto the low-side driver output terminal; body diode current flow monitoring means for determining when a current flow through the body diode of the high-side transistor rises above a predetermined threshold current during a time when the high-side gate driver circuit is controlling the high-side transistor to be off, and for causing the high-side transistor in response to the determining to be turned on such that the high-side transistor is on even though a digital signal of the predetermined digital logic value is not present on the high-side driver digital control signal input terminal; and means for turning the high-side transistor off so that both the high-side transistor and the low-side transistor are not on and conductive at the same time, and wherein the gate driver integrated circuit does not include any digital processor that fetches and executes instructions. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23)
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Specification