Isolated high frequency DC/DC switching regulator
First Claim
1. A driver circuit for a first n-type power transistor in an H-bridge circuit, the H-bridge circuit comprising the first n-type power transistor and a second n-type power transistor, the H-bridge circuit coupled to first and second terminals of a miniaturized transformer that is coupled to operate at a very high frequency (VHF), the driver circuit comprising:
- a first p-type transistor and an n-type transistor coupled between an upper rail and a lower rail, an output taken between the drains of the first p-type transistor and the n-type transistor being coupled to a gate of the first n-type power transistor;
a sample-and-hold capacitor coupled to capture a drain voltage for the first n-type power transistor on a first edge of a control signal for the first n-type power transistor;
a comparator coupled to compare the captured drain voltage to a lower rail on a given edge of a clock signal and to provide a comparator value;
an up/down counter coupled to receive the comparator value, to adjust a counter value responsive to receiving the comparator value and to output the counter value; and
a first timing circuit coupled to receive the counter value and to send an adjustable pulse towards a gate of the first p-type transistor and a gate of the n-type transistor.
1 Assignment
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Accused Products
Abstract
An electronic device, which includes an H-bridge circuit and a miniaturized transformer that is coupled to operate at VHF frequency, and a driver circuit for an n-type power transistor of the H-bridge circuit are disclosed. The driver circuit includes a first p-type transistor and an n-type transistor coupled between an upper rail and a lower rail, with an output taken between the drains of the first p-type transistor and the n-type transistor being coupled to a gate of the n-type power transistor. The driver circuit also includes a sample-and-hold capacitor coupled to capture a drain voltage for the first n-type power transistor on a first edge of a control signal for the first n-type power transistor and a comparator coupled to compare the captured drain voltage to a lower rail on a given edge of a clock signal and to provide a comparator value. The driver circuit also includes an up/down counter, which is coupled to receive the comparator value, to adjust a counter value responsive to receiving the comparator value and to output the counter value, and a first timing circuit that is coupled to receive the counter value and to send an adjustable pulse towards a gate of the first p-type transistor and a gate of the n-type transistor.
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Citations
19 Claims
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1. A driver circuit for a first n-type power transistor in an H-bridge circuit, the H-bridge circuit comprising the first n-type power transistor and a second n-type power transistor, the H-bridge circuit coupled to first and second terminals of a miniaturized transformer that is coupled to operate at a very high frequency (VHF), the driver circuit comprising:
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a first p-type transistor and an n-type transistor coupled between an upper rail and a lower rail, an output taken between the drains of the first p-type transistor and the n-type transistor being coupled to a gate of the first n-type power transistor; a sample-and-hold capacitor coupled to capture a drain voltage for the first n-type power transistor on a first edge of a control signal for the first n-type power transistor; a comparator coupled to compare the captured drain voltage to a lower rail on a given edge of a clock signal and to provide a comparator value; an up/down counter coupled to receive the comparator value, to adjust a counter value responsive to receiving the comparator value and to output the counter value; and a first timing circuit coupled to receive the counter value and to send an adjustable pulse towards a gate of the first p-type transistor and a gate of the n-type transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An electronic device comprising:
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a miniaturized transformer configured to operate at a very high frequency (VHF) and having a first side and a second side, each of the first and second sides having a first terminal and a second terminal; a first H-bridge circuit on the first side of the transformer, the first H-bridge circuit comprising a first n-type power transistor having a drain coupled to the first terminal on the first side and a second n-type power transistor having a drain coupled to the second terminal on the first side; a first adaptive timing control circuit coupled to drive the first n-type power transistor; and a second adaptive timing control circuit coupled to drive the second n-type power transistor; the first adaptive timing control circuit comprising; a first p-type transistor and an n-type transistor coupled between an upper rail and a lower rail, an output taken between the drains of the first p-type transistor and the n-type transistor being coupled to a gate of the first n-type power transistor; a sample-and-hold capacitor coupled to capture a drain voltage for the first n-type power transistor when the first n-type power transistor is turned OFF; a comparator coupled to compare the captured drain voltage to a lower rail on a given edge of a clock signal and to provide a comparator value; an up/down counter coupled to receive the comparator value, to adjust a counter value responsive to receiving the comparator value and to output the counter value; and a first timing circuit coupled to receive the counter value and to send an adjustable pulse towards a gate of the first p-type transistor and a gate of the n-type transistor. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification