Voltage degradation aware NAND array management

• US 10,096,370 B1
• Filed: 08/31/2017
• Issued: 10/09/2018
• Est. Priority Date: 08/31/2017
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Jean, Sebastien Andre, Singidi, Harish
• Primary Examiner(s): DINH, SON T
• Application Number:
  US15/691,813
• Time in Patent Office: 404 Days
• Field of Search: 36518524
• CPC Class Codes: G06F 13/16 for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.

Claims

1. A NAND device for voltage degradation aware NAND array management, the NAND device comprising:

a NAND array; and

a controller to;

monitor voltage to the NAND device to detect a voltage event;

modify a history of voltage events with the voltage event;

observe a voltage condition from the history of voltage events; and

modify an operational parameter of the NAND array in response to the voltage condition.

2. The NAND device of claim 1, wherein, to modify the operational parameter, the controller changes an error handling procedure of the NAND array.

3. The NAND device of claim 2, wherein the error handling procedure is a bad-block marking procedure.

4. The NAND device of claim 3, wherein the bad-block marking procedure increases an error count allowed before a bad-block is identified during the voltage condition.

5. The NAND device of claim 1, wherein, to modify the operational parameter, the controller changes a write procedure.

6. The NAND device of claim 5, wherein, to change the write procedure, the controller maintains data in a write buffer beyond a point when the data is transferred to the NAND array.

7. The NAND device of claim 6, wherein the data is maintained in the write buffer until a successful read of the data from the NAND array is completed.

8. The NAND device of claim 1, wherein the operational parameter is part of a set of operational parameters that correspond to an operational safety level of the NAND device, where the operational safety level is one of an ordered set of operational safety levels, the set of operational safety levels ordered by corresponding operational parameters that trade speed with data integrity.

9. The NAND device of claim 8, wherein, to modify the operational parameter in response to the voltage condition, the controller increments or decrements from a first member of the set of operational safety levels based on whether the voltage condition is a deterioration or improvement of voltage supplied to the NAND device.

10. The NAND device of claim 1, wherein, to modify the history of voltage events with the voltage event, the controller increments a counter of voltage events.

11. A method for voltage degradation aware NAND array management, the method comprising:

monitoring voltage to a NAND device to detect a voltage event;

modifying a history of voltage events with the voltage event;

observing a voltage condition from the history of voltage events; and

modifying an operational parameter of a NAND array in the NAND device in response to the voltage condition.

12. The method of claim 11, wherein modifying the operational parameter includes changing an error handling procedure of the NAND array.

13. The method of claim 12, wherein the error handling procedure is a bad-block marking procedure.

14. The method of claim 13, wherein the bad-block marking procedure increases an error count allowed before a bad-block is identified during the voltage condition.

15. The method of claim 11, wherein modifying the operational parameter includes changing a write procedure.

16. The method of claim 15, wherein changing the write procedure includes maintaining data in a write buffer beyond a point when the data is transferred to the NAND array.

17. The method of claim 16, wherein the data is maintained in the write buffer until a successful read of the data from the NAND array is completed.

18. The method of claim 11, wherein the operational parameter is part of a set of operational parameters that correspond to an operational safety level of the NAND device, where the operational safety level is one of an ordered set of operational safety levels, the set of operational safety levels ordered by corresponding operational parameters that trade speed with data integrity.

19. The method of claim 18, wherein modifying the operational parameter in response to the voltage condition includes incrementing or decrementing from a first member of the set of operational safety levels based on whether the voltage condition is a deterioration or improvement of voltage supplied to the NAND device.

20. The method of claim 11, wherein modifying the history of voltage events with the voltage event includes incrementing a counter of voltage events.

21. A machine readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:

monitoring voltage to a NAND device to detect a voltage event;

modifying a history of voltage events with the voltage event;

observing a voltage condition from the history of voltage events; and

modifying an operational parameter of a NAND array in the NAND device in response to the voltage condition.

22. The machine readable medium of claim 21, wherein modifying the operational parameter includes changing an error handling procedure of the NAND array.

23. The machine readable medium of claim 22, wherein the error handling procedure is a bad-block marking procedure.

24. The machine readable medium of claim 23, wherein the bad-block marking procedure increases an error count allowed before a bad-block is identified during the voltage condition.

25. The machine readable medium of claim 21, wherein modifying the operational parameter includes changing a write procedure.

26. The machine readable medium of claim 25, wherein changing the write procedure includes maintaining data in a write buffer beyond a point when the data is transferred to the NAND array.

27. The machine readable medium of claim 26, wherein the data is maintained in the write buffer until a successful read of the data from the NAND array is completed.

28. The machine readable medium of claim 21, wherein the operational parameter is part of a set of operational parameters that correspond to an operational safety level of the NAND device, where the operational safety level is one of an ordered set of operational safety levels, the set of operational safety levels ordered by corresponding operational parameters that trade speed with data integrity.

29. The machine readable medium of claim 28, wherein modifying the operational parameter in response to the voltage condition includes incrementing or decrementing from a first member of the set of operational safety levels based on whether the voltage condition is a deterioration or improvement of voltage supplied to the NAND device.

30. The machine readable medium of claim 21, wherein modifying the history of voltage events with the voltage event includes incrementing a counter of voltage events.