Encapsulated microelectromechanical structure

• US 10,099,917 B2
• Filed: 08/25/2017
• Issued: 10/16/2018
• Est. Priority Date: 01/20/2006
• Status: Active Grant

• Current Assignee: SiTime Corporation (Megachips Corporation)
• Original Assignee: SiTime Corporation (Megachips Corporation)
• Inventors: Partridge, Aaron, Lutz, Markus, Gupta, Pavan
• Primary Examiner(s): Fourson, III, George
• Application Number:
  US15/686,480
• Publication Number:
  US 20180044176A1
• Time in Patent Office: 417 Days
• Field of Search: 257417, 257684, 257773, 438 52, 438 98
• CPC Class Codes: B81B 2201/0271 Resonators; ultrasonic resonators
• CPC Class Codes: B81B 2203/0315 Cavities
• CPC Class Codes: B81B 2203/04 Electrodes
• CPC Class Codes: B81B 2207/07 Interconnects
• CPC Class Codes: B81B 7/0035 for maintaining a controlled atmosphere inside of the chamber containing the MEMS
• CPC Class Codes: B81B 7/0058 for protecting against damages due to external chemical or mechanical influences, e.g. shocks or vibrations
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 1/00277 for maintaining a controlled atmosphere inside of the cavity containing the MEMS
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2201/0171 Doping materials
• CPC Class Codes: B81C 2203/031 Anodic bondings
• CPC Class Codes: B81C 2203/036 Fusion bonding
• CPC Class Codes: B81C 2203/037 Thermal bonding techniques not provided for in B81C2203/035 - B81C2203/036
• CPC Class Codes: B81C 2203/038 Bonding techniques not provided for in B81C2203/031 - B81C2203/037
• CPC Class Codes: H01L 23/051 another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10N 30/306 Cantilevers

Abstract

After forming a microelectromechanical-system (MEMS) resonator within a silicon-on-insulator (SOI) wafer, a complementary metal oxide semiconductor (CMOS) cover wafer is bonded to the SOI wafer via one or more eutectic solder bonds that implement respective paths of electrical conductivity between the two wafers and hermetically seal the MEMS resonator within a chamber.

Claims

1. A method of fabricating a microelectromechanical system (MEMS) device, the method comprising:

forming a MEMS resonator within a semiconductor layer of a semiconductor-on-insulator (SOI) wafer;

bonding a complementary metal oxide semiconductor (CMOS) cover wafer to the SOI wafer via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover wafer and the SOI wafer, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover wafer and the substrate layer of the SOI wafer, wherein bonding the CMOS cover wafer to the SOI wafer via one or more eutectic solder bonds that implement respective paths of electrical conductivity between the CMOS cover wafer and the SOI wafer comprises forming a first eutectic solder bond that implements a path of electrical conductivity between respective contact regions within the SOI wafer and CMOS cover wafer; and

forming, as the contact region within the CMOS cover wafer, a contact region that extends between opposite surfaces of the CMOS cover wafer.

3. The method of claim 1, further comprising doping a region of the CMOS cover wafer to form the contact region within the CMOS cover wafer.

4. The method of claim 1, further comprising forming at least one of the contact region within SOI wafer and the contact region within the CMOS cover wafer prior to bonding the CMOS cover wafer to the SOI wafer.

5. The method of claim 1, further comprising forming, as the contact region within the SOI wafer, a conductive structure that extends into the enclosed chamber.

6. The method of claim 1, wherein the SOI wafer comprises an oxide insulation layer disposed between the semiconductor layer and the substrate layer, and wherein forming the MEMS resonator within the semiconductor layer of the SOI wafer comprises forming one or more trenches that define a region of semiconductor layer and removing a portion of the oxide insulation layer from between the substrate layer and the trench-defined region of the semiconductor layer.

7. The method of claim 1 wherein forming the MEMS resonator comprises forming a cavity in a region of the semiconductor layer prior to bonding the CMOS cover wafer to the SOI wafer so that, after bonding the CMOS cover wafer to the SOI wafer, the region of the semiconductor layer is separated from the CMOS cover wafer by a void.

8. The method of claim 1 wherein the CMOS cover wafer comprises circuitry electrically coupled to the SOI wafer at least in part through one of the one or more eutectic solder bonds.

2. A method of fabricating a microelectromechanical system (MEMS) device, the method comprising:

forming a MEMS resonator within a semiconductor layer of a semiconductor-on-insulator (SOI) wafer; and

bonding a complementary metal oxide semiconductor (CMOS) cover wafer to the SOI wafer via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover wafer and the SOI wafer, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover wafer and the substrate layer of the SOI wafer, wherein bonding the CMOS cover wafer to the SOI wafer via one or more eutectic solder bonds that implement respective paths of electrical conductivity between the CMOS cover wafer and the SOI wafer comprises forming a first eutectic solder bond that implements a path of electrical conductivity between respective contact regions within the SOI wafer and CMOS cover wafer; and

forming a via within the CMOS cover wafer to implement the contact region within the CMOS cover wafer.

9. A microelectromechanical system (MEMS) device comprising:

a semiconductor-on-insulator (SOI) substrate having (i) first and second semiconductor layers separated by an insulation layer, a MEMS resonator formed within the first semiconductor layer; and

a complementary metal oxide semiconductor (CMOS) cover substrate bonded to the SOI substrate via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover substrate and the MEMS substrate, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover substrate and the second semiconductor layer of the SOI substrate, wherein the SOI substrate and the CMOS cover substrate comprise counterpart contact regions and wherein the one or more eutectic solder bonds that implement respective paths of electrical conductivity between the CMOS cover substrate and the SOI substrate comprise a first eutectic solder bond that implements a path of electrical conductivity between the counterpart contact regions within the SOI substrate and the CMOS cover substrate and wherein the contact region within the CMOS cover substrate extends between opposite surfaces of the CMOS cover substrate.

11. The MEMS device of claim 9 wherein the contact region within the CMOS cover substrate comprises a doped region of the CMOS cover substrate.

12. The MEMS device of claim 9 wherein the contact region within the SOI substrate comprises a conductive structure that extends into the enclosed chamber.

13. The MEMS device of claim 9 wherein the MEMS resonator is (i) defined by one or more trenches in the first semiconductor layer and (ii) separated from the second semiconductor layer by a void left by removal of a portion of the insulation layer.

14. The MEMS device of claim 13 wherein the MEMS resonator is separated from the CMOS cover substrate by a void left from formation of a cavity in the first semiconductor layer prior to bonding the CMOS cover substrate to the SOI substrate.

15. The MEMS device of claim 9 wherein the CMOS cover substrate comprises circuitry electrically coupled to the SOI wafer at least in part through one of the one or more eutectic solder bonds.

16. The MEMS device of claim 15 wherein the circuitry comprises CMOS transistors.

10. A microelectromechanical system (MEMS) device comprising:

a semiconductor-on-insulator (SOI) substrate having (i) first and second semiconductor layers separated by an insulation layer, a MEMS resonator formed within the first semiconductor layer; and

a complementary metal oxide semiconductor (CMOS) cover substrate bonded to the SOI substrate via one or more eutectic solder bonds that (i) implement respective paths of electrical conductivity between the CMOS cover substrate and the MEMS substrate, and (ii) hermetically seal the MEMS resonator within a chamber enclosed at least in part by the CMOS cover substrate and the second semiconductor layer of the SOI substrate, wherein the SOI substrate and the CMOS cover substrate comprise counterpart contact regions and wherein the one or more eutectic solder bonds that implement respective paths of electrical conductivity between the CMOS cover substrate and the SOI substrate comprise a first eutectic solder bond that implements a path of electrical conductivity between the counterpart contact regions within the SOI substrate and the CMOS cover substrate and wherein the contact region within the CMOS cover substrate comprises a conductive via.