Holistic global performance and power management

• US 10,101,786 B2
• Filed: 12/22/2014
• Issued: 10/16/2018
• Est. Priority Date: 12/22/2014
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Eastep, Jonathan M., Greco, Richard J.
• Primary Examiner(s): Truong, Camquy
• Application Number:
  US14/580,150
• Publication Number:
  US 20160179162A1
• Time in Patent Office: 1,394 Days
• CPC Class Codes: G06F 1/189 Power distribution
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/329 by task scheduling
• CPC Class Codes: G06F 9/38 Concurrent instruction execution, e.g. pipeline or look ahead
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: G06F 9/4893 taking into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: G06F 9/50 Allocation of resources, e.g. of the central processing unit [CPU]
• CPC Class Codes: G06F 9/505 considering the load
• CPC Class Codes: G06F 9/5094 where the allocation takes into account power or heat criteria power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206
• CPC Class Codes: G06F 9/522 Barrier synchronisation
• CPC Class Codes: G06N 20/00 Machine learning
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and apparatus to provide holistic global performance and power management are described. In an embodiment, logic (e.g., coupled to each compute node of a plurality of compute nodes) causes determination of a policy for power and performance management across the plurality of compute nodes. The policy is coordinated across the plurality of compute nodes to manage a job to one or more objective functions, where the job includes a plurality of tasks that are to run concurrently on the plurality of compute nodes. Other embodiments are also disclosed and claimed.

Claims

1. An apparatus comprising:

logic, at least a portion of which is in hardware, wherein the logic is coupled to each node of a plurality of nodes to cause determination of a policy for power and performance management to transmit to the plurality of nodes,

wherein the policy is to cause coordination of power and performance management across the plurality of nodes, wherein the policy is to manage a job to one or more objective functions, wherein the job is to comprise a plurality of tasks that are to run concurrently on the plurality of nodes, wherein the one or more objective functions are to comprise reduction of performance differences between the plurality of nodes while meeting a power cap, wherein the logic is to cause application of non-uniform power caps for each of plurality of nodes, wherein the logic is to operate in accordance with hierarchical machine learning operations, wherein the plurality of nodes is to form a cabinet, wherein the policy is decomposed hierarchically among one or more cabinets and then among the plurality of nodes in the job and across software and hardware abstraction layers.

2. The apparatus of claim 1, wherein the logic is to determine a separate policy for each of the plurality of nodes.

3. The apparatus of claim 1, wherein the logic is to determine a separate policy for at least a portion of each of the plurality of nodes.

4. The apparatus of claim 1, wherein the one or more objective functions are to further comprise one or more of:

maximize performance while meeting a power cap, maximize energy efficiency while meeting a power cap, maximize performance, or maximize efficiency, or maximize performance and maximize efficiency while meeting a power cap.

5. The apparatus of claim 1, wherein the logic is to perform one or more operations to solve one or more of:

a load imbalance problem, a scalability problem, or a flexibility problem.

6. The apparatus of claim 1, wherein the policy is to coordinate power and performance management across all nodes in the job.

7. The apparatus of claim 1, wherein the policy is to coordinate power and performance management across all nodes in the job and across software and hardware abstraction layers.

8. The apparatus of claim 1, wherein the logic is to determine the policy in accordance with a stochastic policy gradients technique.

9. The apparatus of claim 1, further comprising a scalable overlay network to couple the plurality of nodes.

10. The apparatus of claim 1, further comprising a scalable overlay network to couple the plurality of nodes, wherein the scalable overlay network is to provide aggregation of power or performance telemetry and dissemination of control.

11. The apparatus of claim 1, wherein a System On Chip (SOC) integrated circuit is to comprise the logic and memory.

12. The apparatus of claim 1, wherein each node of the plurality of nodes is to comprise one or more of:

a processor, having one or more processor cores, a graphics processing unit, having one or more processor cores, a connection to a network fabric, a log in component, a service component, memory, or an input/output device.

13. The apparatus of claim 1, wherein the logic is to perform one or more operations to solve a plurality of problems consisting of:

a load imbalance problem, a scalability problem, and a flexibility problem.

14. A method comprising:

causing, at logic, determination of a policy for power and performance management for each node of a plurality of nodes; and

transmitting the policy to the plurality of nodes,

wherein the policy causes coordination of power and performance management across the plurality of nodes, wherein the policy manages a job to one or more objective functions, wherein the job comprises a plurality of tasks that are to run concurrently on the plurality of nodes, wherein the one or more objective functions comprises reduction of performance differences between the plurality of nodes while meeting a power cap, wherein non-uniform power caps are applied for each of plurality of nodes, wherein the logic operates in accordance with hierarchical machine learning operations, wherein the plurality of nodes form a cabinet, wherein the policy is decomposed hierarchically among one or more cabinets and then among the plurality of nodes in the job and across software and hardware abstraction layers.

15. The method of claim 14, further comprising determining a separate policy for each of the plurality of nodes.

16. The method of claim 14, further comprising determining a separate policy for at least a portion of each of the plurality of nodes.

17. The method of claim 14, wherein the one or more objective functions further comprise one or more of:

maximize performance while meeting a power cap, maximize energy efficiency while meeting a power cap, maximize performance, or maximize efficiency, or maximize performance and maximize efficiency while meeting a power cap.

18. The method of claim 14, wherein the determination is performed to solve one or more of:

a load imbalance problem, a scalability problem, or a flexibility problem.

19. The method of claim 14, further comprising the policy coordinating power and performance management across all nodes in the job.

20. The method of claim 14, further comprising the policy coordinating power and performance management across all nodes in the job and across software and hardware abstraction layers.

21. A non-transitory computer-readable medium comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:

cause, at logic, determination of a policy for power and performance management for each node of a plurality of nodes; and

transmit the policy to the plurality of nodes,

wherein the policy causes coordination of power and performance management across the plurality of nodes, wherein the policy manages a job to one or more objective functions, wherein the job comprises a plurality of tasks that are to run concurrently on the plurality of nodes, wherein the one or more objective functions comprises reduction of performance differences between the plurality of nodes while meeting a power cap, wherein non-uniform power caps are applied for each of plurality of nodes, wherein the logic is to operate in accordance with hierarchical machine learning operations, wherein the plurality of nodes is to form a cabinet, wherein the policy is decomposed hierarchically among one or more cabinets and then among the plurality of nodes in the job and across software and hardware abstraction layers.

22. The non-transitory computer-readable medium of claim 21, further comprising one or more instructions that when executed on the processor configure the processor to perform one or more operations to cause determination of a separate policy for each of the plurality of nodes.

23. The non-transitory computer-readable medium of claim 21, further comprising one or more instructions that when executed on the processor configure the processor to perform one or more operations to cause determination of a separate policy for at least a portion of each of the plurality of nodes.