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Laterally diffused metal oxide semiconductor with gate poly contact within source window

  • US 10,103,258 B2
  • Filed: 12/29/2016
  • Issued: 10/16/2018
  • Est. Priority Date: 12/29/2016
  • Status: Active Grant
First Claim
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1. An integrated circuit comprising:

  • a semiconductor material substrate;

    a power transistor having at least one transistor finger that lies within the semiconductor material substrate, each transistor finger including;

    a source region stripe;

    a drain region stripe substantially parallel to the source region stripe;

    a channel region stripe located substantially parallel to and between the source region stripe and the drain region stripe;

    a gate oxide that overlies the channel region stripe;

    spaced apart thick oxide islands that overlie the source region stripe;

    a gate structure that overlies the gate oxide and the thick oxide islands, in which contacts are connected to the gate structure over the thick oxide islands; and

    a conductive gate runner connected to the contacts of the gate structure over the thick oxide islands.

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