Level shifter circuit, corresponding apparatus and method

• US 10,103,734 B2
• Filed: 05/31/2016
• Issued: 10/16/2018
• Est. Priority Date: 11/24/2015
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Bianchi, Dario, Guanziroli, Federico, Ghisu, Davide Ugo
• Primary Examiner(s): Tra, Quan
• Application Number:
  US15/168,468
• Publication Number:
  US 20170149434A1
• Time in Patent Office: 868 Days
• Field of Search: 327333
• CPC Class Codes: H03K 19/018507 Interface arrangements
• CPC Class Codes: H03K 3/037 Bistable circuits
• CPC Class Codes: H03K 3/356113 using additional transistors in the input circuit

Abstract

A level shifter circuit includes: an input stage for receiving an input signal switchable between a first and a second input level and an output stage to produce a drive signal for the load that is switchable between a first and a second output level. A level translator translates the input signal switching between the input levels into the output stage switching between the output levels. A feedback element coupled to the output stage transfers to the input stage a feedback signal representative of the output level of the output stage. The input stage includes control circuitry sensitive to the input signal and the feedback signal for detecting undesired switching of the output stage between the first and second output levels occurring in the absence of input signal switching between the first and second input levels. The control circuitry inverts the output level of the output stage resulting from undesired switching.

Claims

1. A level shifter circuit for driving a load via a power supply line, the level shifter circuit comprising:

an input stage for receiving an input signal switchable between a first and a second input level;

an output stage coupled to said power supply line to produce a drive signal for said load, the output stage switchable between a first and a second output level;

a level translator coupled between the input stage and the output stage, wherein said input signal switching between said first and second input levels causes said output stage to switch between said first and second output levels;

a feedback element coupled to said output stage for transferring to said input stage a feedback signal representative of the output level of the output stage; and

control circuitry sensitive to said input signal and said feedback signal and configured for detecting undesired switching of said drive signal between said first and second output levels occurring in the absence of a switching of the input signal between said first and second input levels and inverting the output level of said drive signal resulting from said undesired switching, the control circuitry including;

a pulse circuit driven by said feedback signal, said pulse circuit coupleable to said level translator to apply to said level translator drive pulses for switching said output stage between said first and second output levels,

a coupling circuit coupled between said pulse circuit and said level translator, said coupling circuit sensitive to said input signal to couple said pulse circuit in a coupling condition to said level translator to apply to said level translator drive pulses for inverting the output level of said output stage resulting from said undesired switching of said output stage.

2. The level shifter circuit of claim 1, wherein said control circuitry sensitive to said input signal is configured for detecting switching of said output stage between said first and second output levels occurring as a result of input signal switching between said first and second input levels and refreshing the output level resulting from said input signal switching.

3. The level shifter circuit of claim 1, said feedback element includes a capacitor coupled between said output stage and said control circuitry.

4. The level shifter circuit of claim 1, including a level translator coupled between an input stage for receiving an input signal switchable between first and second low-voltage input levels and an output stage for producing a high-voltage drive signal for said load.

5. The level shifter circuit of claim 1, wherein said level translator includes a switching stage including electronic switches.

6. The level shifter circuit of claim 5, wherein the electronic switches comprise MOSFET transistors.

7. The level shifter circuit of claim 1, wherein said output stage includes a latch element having inputs coupled to said level translator and an output switchable between said first and second output levels as a function of said inputs.

8. The level shifter circuit of claim 1, wherein said coupling circuit admits a further coupling condition to couple said pulse circuit to said level translator to apply to said level translator drive pulses maintaining the output level of said output stage at one of said first and second output levels resulting from said input signal switching between said first and second input levels.

9. The level shifter of claim 1, wherein said output stage includes a filter, preferably of the low-pass type, to produce said drive signal for said load.

10. An electronic system, comprising:

a level shifter circuit including,

an input circuit configured to receive an input signal switchable between a first input level and a second input level and configured to generate a control signal responsive to the input signal;

a level translator circuit coupled to the input circuit and configured to generate a level shifted control signal switchable between a first output level and a second output level responsive to the control signal from input circuit;

an output circuit coupled to the level translator and configured to generate a first drive signal switchable between the first output level and the second output level responsive to the level-shifted control signal;

a feedback circuit coupled between the output circuit and the input circuit and configured to generate a feedback signal indicating a change in the level of the first drive signal from the output circuit, the feedback circuit further configured to detect an inconsistency between the level of the input signal and the level of the first drive signal and to generate the control signal to cause the level translator circuit and output circuit to generate the first drive signal having the proper level corresponding to the level of the input signal, the feedback circuit including;

a pulse generation circuit configured to generate an output pulse responsive to a transition of first drive signal; and

logic circuitry coupled to receive the output pulse and configured to generate the control signal causing the level translator circuit to generate the level shifted control signal that causes the output circuit to drive the first drive signal to the level corresponding to the level of the input signal; and

load circuitry coupled to the output circuit.

11. The electronic system of claim 10, wherein the load circuitry comprises ultrasound circuitry including an ultrasound pulser.

12. The electronic system of claim 10, wherein the feedback circuit further comprise a capacitor coupled between the output circuit and the input circuit, the feedback signal being generated by the capacitor responsive to a change in the level of the first drive signal.

13. The electronic system of claim 10, wherein the output circuit further comprises:

an RS latch having set and reset inputs coupled to the level translator the level shifted control signal and having an output coupled to the capacitor; and

a buffer coupled between the output of the RS latch and the load circuitry.

14. The electronic system of claim 13, wherein the buffer comprises an inverting buffer.

15. A method, comprising:

receiving an input signal switchable between a first and a second input level;

generating one a drive node a drive signal in response to the input signal, the drive signal switchable between a first and a second output level different from the first and second input level;

capacitively coupling the drive node to a feedback node;

generating on the feedback node a feedback signal responsive to a transition of the drive signal;

generating a pulse signal in response to the feedback signal;

detecting undesired switching of said drive signal between said first and second output levels occurring in the absence of a switching of the input signal between said first and second input levels; and

inverting the level of said drive signal in response to the pulse signal if detecting said undesired switching.

16. The method of claim 15, wherein receiving the input signal comprises generating a pulse signal responsive to transitions of the input signal between the first and the second input levels.

17. The method of claim 16, wherein generating on the drive node the drive signal in response to the input signal comprises:

generating at least one level shifted control signal in response to the input signal, the level shifted control signal being switchable between the first and second output levels; and

generating the drive signal in response to the at least one level shifted control signal.

18. The method of claim 17, wherein detecting undesired switching of said drive signal comprises controlling switching of the pulse signal based on the input signal.