Light emitting diode chip

• US 10,109,768 B2
• Filed: 07/07/2017
• Issued: 10/23/2018
• Est. Priority Date: 12/08/2016
• Status: Active Grant

• Current Assignee: PlayNitride Display Co., Ltd.
• Original Assignee: PlayNitride Inc.
• Inventors: Wu, Jyun-De, Lo, Yu-Yun
• Primary Examiner(s): Dang, Phuc
• Application Number:
  US15/643,485
• Publication Number:
  US 20180166607A1
• Time in Patent Office: 473 Days
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/30 containing only elements of Group III and Group V of the Periodic Table
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/42 Transparent materials

Abstract

A light-emitting diode chip including a p-type semiconductor layer, a light-emitting layer and an n-type semiconductor layer is provided. The light-emitting layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer. A ratio of a sum of thicknesses of all semiconductor layers of the light-emitting diode chip over a maximum width of the light-emitting diode chip ranges from 0.02 to 1.5. A ratio of a sum of thicknesses of all semiconductor layers located in a side of the light-emitting layer toward the p-type semiconductor layer over the sum of thicknesses of all semiconductor layers of the light-emitting diode chip ranges from 0.05 to 0.2.

Claims

1. A micro light emitting diode (micro LED) chip, comprising:

a p-type semiconductor layer, wherein the p-type semiconductor layer comprises;

a p-type cladding layer; and

a p-type ohmic contact layer, wherein a material of the p-type ohmic contact layer is a carbon-doped gallium phosphide;

a light-emitting layer, wherein the p-type cladding layer is disposed between the p-type ohmic contact layer and the light-emitting layer; and

an n-type semiconductor layer, wherein the light-emitting layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer, a ratio of a sum of thicknesses of all semiconductor layers of the micro LED chip over a maximum width of the micro LED chip ranges from 0.02 to 1.5, and a ratio of a sum of thicknesses of all semiconductor layers located in a side of the light-emitting layer toward the p-type semiconductor layer over the sum of thicknesses of all semiconductor layers of the micro LED chip ranges from 0.05 to 0.2.

2. The micro LED chip according to claim 1, wherein the sum of thicknesses of all semiconductor layers located in the side of the light-emitting layer toward the p-type semiconductor layer is a sum of a thickness of the p-type cladding layer and a thickness of the p-type ohmic contact layer.

3. The micro LED chip according to claim 1, wherein a ratio of a thickness of the p-type ohmic contact layer over the sum of thicknesses of all semiconductor layers of the micro LED chip is larger than 0 and smaller than or equal to 0.05.

4. The micro LED chip according to claim 1, wherein a ratio of a thickness of the p-type ohmic contact layer over the sum of thicknesses of all semiconductor layers located in the side of the light-emitting layer toward the p-type semiconductor layer ranges from 0.1 to 0.25.

5. The micro LED chip according to claim 1, wherein a material of the p-type cladding layer is aluminum indium phosphide.

6. The micro LED chip according to claim 1, wherein the n-type semiconductor layer comprises:

a n-type cladding layer; and

an etch-stop layer, wherein the n-type cladding layer is disposed between the light-emitting layer and the etch-stop layer.

7. The micro LED chip according to claim 6, wherein a material of the etch-stop layer is gallium arsenide, and a thickness of the etch-stop layer is smaller than or equal to 600 Å

.

8. The micro LED chip according to claim 6, wherein the n-type semiconductor layer further comprises:

a n-type semiconductor sub-layer, wherein the n-type cladding layer is disposed between the light-emitting layer and the n-type semiconductor sub-layer, and the n-type semiconductor sub-layer is disposed between the n-type cladding layer and the etch-stop layer.

9. The micro LED chip according to claim 1, further comprising:

a first electrode and a second electrode which are respectively electrically connected to the p-type semiconductor layer and the n-type semiconductor layer, wherein the p-type cladding layer is in direct contact with the light emitting layer, the p-type ohmic contact layer is in direct contact with the p-type cladding layer, and the first electrode is in direct contact with the p-type ohmic contact layer.

10. A micro light emitting diode (micro LED) chip, comprising:

a p-type semiconductor layer;

a light-emitting layer; and

an n-type semiconductor layer, wherein the light-emitting layer is disposed between the p-type semiconductor layer and the n-type semiconductor layer, a ratio of a sum of thicknesses of all semiconductor layers of the micro LED chip over a maximum width of the micro LED chip ranges from 0.02 to 1.5, and a ratio of a sum of thicknesses of all semiconductor layers located in a side of the light-emitting layer toward the p-type semiconductor layer over the sum of thicknesses of all semiconductor layers of the micro LED chip ranges from 0.05 to 0.2,

wherein the number of all semiconductor layers of the p-type semiconductor layer is less than the number of all semiconductor layers of the n-type semiconductor layer.

11. The micro LED chip according to claim 10, further comprising:

a first electrode and a second electrode which are respectively electrically connected to the p-type semiconductor layer and the n-type semiconductor layer, wherein the p-type semiconductor layer comprises a p-type cladding layer and a p-type ohmic contact layer, the p-type cladding layer is disposed between the p-type ohmic contact layer and the light-emitting layer, the p-type cladding layer is in direct contact with the p-type cladding layer, and the first electrode is in direct contact with the p-type ohmic contact layer.