Low power chip-to-chip bidirectional communications

• US 10,116,468 B1
• Filed: 06/28/2017
• Issued: 10/30/2018
• Est. Priority Date: 06/28/2017
• Status: Active Grant

• Current Assignee: Kandou Labs, SA
• Original Assignee: Kandou Labs, SA
• Inventors: Hormati, Ali
• Primary Examiner(s): Puente, Eva
• Application Number:
  US15/636,309
• Time in Patent Office: 489 Days
• Field of Search: 375340
• CPC Class Codes: H01Q 13/24 constituted by a dielectric or ferromagnetic rod or pipe H01Q13/28 takes precedence
• CPC Class Codes: H04B 3/14 characterised by the equalising network used
• CPC Class Codes: H04L 2025/03363 Multilevel H04L2025/03369 takes precedence
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission
• CPC Class Codes: H04L 25/0292 Arrangements specific to the receiver end
• CPC Class Codes: H04L 25/085 Arrangements for reducing interference in line transmission systems, e.g. by differential transmission
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04L 25/4919 using balanced multilevel codes H04L25/4927 takes precedence
• CPC Class Codes: H04W 72/23 in the downlink direction of a wireless link, i.e. towards a terminal

Abstract

Methods and systems are described for receiving symbols of a codeword via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix, generating a plurality of comparator outputs using a plurality of common-mode resistant multi-input comparators (MICs), each common-mode resistant MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a common-mode sub-channel vector, outputting a set of forward-channel output bits formed based on the plurality of comparator outputs, obtaining a sequence of reverse-channel bits, and transmitting the sequence of reverse-channel bits by sequentially transmitting common-mode codewords over the wires of the multi-wire bus.

Claims

1. A method comprising:

receiving, at a receiver, symbols of a codeword, the symbols received via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix;

generating a plurality of comparator outputs using a plurality of common-mode resistant multi-input comparators (MICs), each common-mode resistant MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a common-mode sub-channel vector, each comparator output indicative of the weight applied to the corresponding sub-channel vector;

outputting a set of forward-channel output bits formed based on the plurality of comparator outputs;

obtaining a sequence of reverse-channel bits; and

transmitting the sequence of reverse-channel bits by sequentially transmitting common-mode codewords over the wires of the multi-wire bus, each common-mode codeword transmitted by modulating weights of a common-mode sub-channel vector according to a corresponding bit in the sequence of reverse-channel bits.

2. The method of claim 1, wherein the set of forward-channel output bits further comprises an output bit formed from a comparator output of a common-mode MIC.

3. The method of claim 2, wherein the reverse-channel bits are selectively transmitted, and wherein the output bit formed from the common-mode MIC is formed in a time interval when the reverse-channel bits are not being transmitted.

4. The method of claim 1, wherein the reverse-channel bits are transmitted at a rate that is less than a symbol rate of the received symbols of the codeword.

5. The method of claim 4, wherein the rate of the reverse-channel codeword is 256×

slower than the symbol rate of the received symbols.

6. The method of claim 1, wherein the reverse-channel bits are obtained from a serializer.

7. The method of claim 1, wherein the reverse-channel bits comprise bits selected from the group consisting of:

command bits, error information bits, and management information bits.

8. The method of claim 1, wherein the orthogonal matrix is represented by M:

9. The method of claim 1, wherein the common-mode codewords are transmitted by modulating a baseline voltage of the wires of the multi-wire bus.

10. The method of claim 1, wherein the common-mode codewords are transmitted by sourcing and sinking current into the wires of the multi-wire bus.

11. An apparatus comprising:

a plurality of common-mode resistant multi-input comparators (MICs), each common-mode resistant configured to;

receive symbols of a codeword, the symbols received via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix; and

generate a plurality of comparator outputs, each common-mode resistant MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a common-mode sub-channel vector, each comparator output indicative of the weight applied to the corresponding sub-channel vector;

a plurality of samplers configured to output a set of forward-channel output bits formed by slicing the plurality of comparator outputs; and

a line driver configured to obtain a sequence of reverse-channel bits, and to responsively transmit the sequence of reverse-channel bits by sequentially transmitting common-mode codewords over the wires of the multi-wire bus, the line driver configured to transmit each common-mode codeword modulating weights of a common-mode sub-channel vector according to a corresponding bit in the sequence of reverse-channel bits.

12. The apparatus of claim 11, wherein the set of forward-channel output bits further comprises a bit generated using comparator output formed using a common-mode MIC.

13. The apparatus of claim 11, wherein the line driver is configured to selectively transmit the reverse-channel bits, and wherein the output bit formed from the common-mode MIC is formed in a time interval when the reverse-channel bits are not being transmitted.

14. The apparatus of claim 11, wherein the line driver is configured to transmit the reverse-channel bits at a rate that is less than a symbol rate of the received symbols of the codeword.

15. The apparatus of claim 14, wherein the rate of the reverse-channel codeword is 256×

slower than the symbol rate of the received symbols.

16. The apparatus of claim 11, wherein the reverse-channel bits are obtained from a serializer.

17. The apparatus of claim 11, wherein the reverse-channel bits comprise bits from the group consisting of:

command bits, error information bits, and management information bits.

18. The apparatus of claim 11, wherein the line driver is configured to transmit the common-mode codewords by modulating a baseline voltage of the wires of the multi-wire bus.

19. The apparatus of claim 11, wherein the line driver comprises a plurality of switched-current sources configured to sink and supply current to the wires of the multi-wire bus to transmit the common-mode codewords.

20. A method comprising:

receiving, at a receiver, symbols of a codeword, the symbols received via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix;

generating a plurality of comparator outputs using a plurality of common-mode resistant multi-input comparators (MICs), each common-mode resistant MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a common-mode sub-channel vector, each comparator output indicative of the weight applied to the corresponding sub-channel vector;

generating a comparator output using a common-mode MIC, the common-mode MIC configured to form a summation of values on all the wires of the multi-wire bus and compare the summation against a reference value; and

outputting a set of forward-channel output bits formed based on the plurality of comparator outputs.