Offload processing of data packets containing financial market data

• US 10,121,196 B2
• Filed: 03/15/2013
• Issued: 11/06/2018
• Est. Priority Date: 03/27/2012
• Status: Active Grant

• Current Assignee: Exegy Incorporated
• Original Assignee: Ip Reservoir, LLC
• Inventors: Parsons, Scott, Taylor, David E., Indeck, Ronald S.
• Primary Examiner(s): Patel, Jagdish
• Assistant Examiner(s): Nguyen, Liz P
• Application Number:
  US13/833,098
• Publication Number:
  US 20130262287A1
• Time in Patent Office: 2,062 Days
• Field of Search: 705 37
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange

Abstract

Various techniques are disclosed for offloading the processing of data packets that contain financial market data. For example, incoming data packets can be processed through an offload processor to generate a new stream of outgoing data packets that organize financial market data in a manner different than the incoming data packets. Furthermore, in an exemplary embodiment, the offloaded processing can be resident in an intelligent switch, such as an intelligent switch upstream or downstream from an electronic trading platform.

Claims

1. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports;

switching logic; and

a processor, wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP);

wherein the switching logic and processor are co-resident within the intelligent switch;

at least one of the ports being configured to receive a plurality of incoming data packets, the incoming data packets comprising a plurality of financial market data messages, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the financial market data;

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets; and

wherein the at least one member is configured to perform a packet mapping operation on at least a portion of the data describing the financial market data; and

wherein, as part of the packet mapping operation for each of a plurality of the received incoming data packets, the at least one member is further configured to (1) determine a financial market data feed associated with a received incoming data packet, (2) access metadata associated with the determined financial market data feed, the metadata comprising data for enabling a parsing of that received incoming data packet, and (3) associate the accessed metadata with that received incoming data packet.

2. The switch of claim 1 wherein the parsing enabling data comprises a packet parsing template.

3. The switch of claim 2 wherein the at least one member is further configured to determine the financial market data feeds associated with the received incoming data packets according to a mapping to the metadata based on a tuple drawn from the received incoming data packets, the tuple comprising at least two members of the group consisting of an IP source address, a destination address, a protocol identifier, a source port number, and a destination port number for the received incoming data packets.

4. The switch of claim 3 wherein the at least one member is further configured to perform the mapping via a hash table based on the tuple.

5. The switch of claim 2 wherein the accessed metadata further comprises a financial market data message parsing template.

6. The switch of claim 5 wherein the accessed metadata further comprises a pre-normalization template for financial market data within the financial market data messages.

7. The switch of claim 5 wherein the accessed metadata further comprises at least one member of the group consisting of (1) a market identification code (MIC), (2) a data source identification code (DSIC), (3) a line identification code (LIC), and (4) a flag for identifying whether the determined financial market data feed employs FIX/FAST encoding.

8. The switch of claim 1 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

9. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports;

switching logic; and

a processor, wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP);

wherein the switching logic and processor are co-resident within the intelligent switch;

at least one of the ports being configured to receive a plurality of incoming data packets, the incoming data packets comprising a plurality of financial market data messages, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments, wherein a plurality of the received incoming data packets correspond to a plurality of financial market data feeds such that a plurality of the received incoming data packets are feed-specific incoming data packets, each of a plurality of the feed-specific incoming data packets comprising a plurality of financial market data messages from the same financial market data feed;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the financial market data;

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets; and

wherein the at least one member is configured to perform a repackaging operation on at least a portion of the data describing the financial market data;

wherein, as part of the repackaging operation, the at least one member is further configured to (1) process the received incoming data packets to depacketize the financial market data messages, (2) process the financial market data of the depacketized financial market data messages to select financial market data according to a criterion, and (3) packetize the selected financial market data to generate a plurality of the outgoing data packets for output via the at least another port, the outgoing data packets comprising criterion-specific outgoing data packets, each criterion-specific outgoing data packet comprising selected financial market data that shares the same criterion, and wherein a plurality of the criterion-specific outgoing data packets group financial market data therein from a plurality of different financial market data feeds.

10. The switch of claim 9 wherein the switching logic is resident on the processor.

11. The switch of claim 10 wherein the processor comprises a field programmable gate array (FPGA).

12. The switch of claim 11 wherein the processor further comprises another FPGA, and wherein the switching logic is resident on an FPGA of the switch.

13. The switch of claim 12 wherein the FPGAs are configured to communicate with each other via a custom interface.

14. The switch of claim 12 wherein the FPGAs are configured to communicate with each other via a PCI-express interface.

15. The switch of claim 12 wherein the FPGAs are configured to communicate with each other via a XAUI interface.

16. The switch of claim 12 wherein the FPGAs are configured to communicate with each other via an Ethernet interface.

17. The switch of claim 9 wherein the switching logic is resident on an application specific integrated circuit (ASIC).

18. The switch of claim 17 wherein the processor is resident on a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a custom interface.

19. The switch of claim 17 wherein the processor is resident on a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a PCI-express interface.

20. The switch of claim 17 wherein the processor is resident on a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via a XAUI interface.

21. The switch of claim 17 wherein the processor is resident on a field programmable gate array (FPGA), wherein the ASIC and the FPGA are configured to communicate with each other via an Ethernet interface.

22. The switch of claim 9 further comprising a control processor for providing instructions to the processor for controlling the repackaging operation in response to input from an external device.

23. The switch of claim 9 wherein the processor is configured to perform (1) a packet mapping operation, (2) a line arbitration operation downstream from the packet mapping operation, (3) a packet parsing operation downstream from the packet mapping operation, (4) a message parsing operation downstream from the packet parsing operation, (5) a symbol mapping operation downstream from the message parsing operation, (6) a data normalization operation downstream from the symbol mapping operation, (7) a symbol routing operation downstream from the data normalization operation, and (8) the repackaging operation downstream from the symbol routing operation, the switch thereby being configured to generate a stream of customized outgoing data packets that organize the financial market data according to a criterion different than how the incoming data packets organized the financial market data.

24. The switch of claim 23 wherein the processor comprises a field programmable gate array (FPGA), the FPGA comprising pipelined firmware logic for performing the data processing operations in parallel with respect to successively received incoming data packets.

25. The switch of claim 9 wherein the plurality of ports comprise a first, second, and third port.

26. The switch of claim 9 wherein the criterion comprises an identifier for the financial instruments described by the financial market data messages.

27. The switch of claim 26 wherein the financial instrument identifier comprises a financial instrument symbol.

28. The switch of claim 27 wherein the plurality of ports further comprise a first output port and a second output port;

wherein the financial market data messages comprise data indicative of a plurality of symbols for the financial instruments to which the financial market data messages pertain;

wherein the at least one member is further configured to (1) select financial market data for which the corresponding symbol data falls within a first set of financial instrument symbols as a first group, (2) packetize selected financial market data in the first group as a first plurality of outgoing data packets, (3) select financial market data for which the corresponding symbol data falls within a second set of financial instrument symbols as a second group, and (4) packetize selected financial market data in the second group as a second plurality of outgoing data packets; and

wherein the switching logic is further configured to (1) direct the first plurality of outgoing data packets for output via the first output port, and (2) direct the second plurality of outgoing data packets for output via the second output port.

29. The switch of claim 9 wherein the criterion comprises which of a plurality of data consumers have an interest in the financial market data.

30. The switch of claim 29 wherein the financial market data messages comprise data indicative of a plurality of symbols for the financial instruments to which the financial market data messages pertain;

wherein the at least one member is further configured to (1) access an interest list, the interest list associating a plurality of data consumers with a plurality of financial instruments of interest to the data consumers, (2) determine which data consumers are interested in which financial market data based on (i) the symbol data of the financial market data messages, and (ii) the accessed interest list, and (3) group financial market data together for packetization in outgoing data packets based on which data consumers are determined to have an interest therein such that a plurality of the outgoing data packets are data consumer-specific outgoing data packets, each data consumer-specific outgoing data packet comprising financial market data for financial instruments of interest to the same data consumer.

31. The switch of claim 30 wherein the plurality of ports further comprise a first output port and a second output port;

and

wherein the switching logic is further configured to (1) direct the data consumer-specific outgoing data packets corresponding to a first data consumer for output via the first output port, and (2) direct the data consumer-specific outgoing data packets corresponding to a second data consumer for output via the second output port.

32. The switch of claim 30 further comprising:

a plurality queues, each queue being associated with a data consumer,

wherein the at least one member is further configured to (1) store financial market data for financial instruments of interest to a data consumer in the queue associated with that data consumer, and (2) packetize commonly-queued financial market data to generate the data consumer-specific outgoing data packets.

33. The switch of claim 32 wherein at least a plurality of the queues are further associated with different sets of financial instrument symbols;

wherein the at least one member is further configured to store financial market data for financial instruments of interest to a data consumer in the queue associated with (i) that data consumer and (ii) the symbol set pertaining to that financial market data.

34. The switch of claim 32 wherein the at least one member further comprises:

packetization logic, the packetization logic configured to (1) select a queue from which to generate a data consumer-specific outgoing data packet, (2) access packaging parameter data that is associated with the selected queue, and (3) generate a data consumer-specific outgoing data packet from financial market data in the selected queue in accordance with the accessed packaging parameter data.

35. The switch of claim 34 further comprising:

a control processor configured to manage the interest list and the packaging parameter data.

36. The switch of claim 9 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

37. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports;

switching logic; and

a processor, wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP);

wherein the switching logic and processor are co-resident within the intelligent switch;

at least one of the ports being configured to receive a plurality of incoming data packets, the incoming data packets comprising a plurality of financial market data messages, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the financial market data;

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets; and

wherein the at least one member is configured to perform a repackaging operation on at least a portion of the data describing the financial market data; and

wherein the at least one member comprises a plurality of processing logic components configured to perform the repackaging operation, the processing logic components configured to operate simultaneously as a processing pipeline.

38. The switch of claim 37 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

39. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports;

switching logic; and

a processor;

wherein the switching logic and processor are co-resident within the intelligent switch;

at least one of the ports being configured to receive a plurality of incoming data packets, the incoming data packets comprising a plurality of financial market data messages, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the financial market data;

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets; and

wherein the processor, for each of a plurality of the received incoming data packets, is configured to (1) determine a financial market data feed associated with a received incoming data packet, (2) access metadata associated with the determined financial market data feed, the metadata comprising data for enabling a parsing of that received incoming data packet, and (3) associate the accessed metadata with that received incoming data packet.

40. The switch of claim 39 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

41. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports;

switching logic; and

a processor;

wherein the switching logic and processor are co-resident within the intelligent switch;

at least one of the ports being configured to receive a plurality of incoming data packets, the incoming data packets comprising a plurality of financial market data messages, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments, wherein a plurality of the received incoming data packets correspond to a plurality of financial market data feeds such that a plurality of the received incoming data packets are feed-specific incoming data packets, each feed-specific incoming data packet comprising a plurality of financial market data messages from the same financial market data feed;

at least another of the ports being configured to output a plurality of outgoing data packets, the outgoing data packets comprising data that describes at least a portion of the financial market data;

wherein the switching logic is configured to determine a port for the outgoing data packets with reference to the incoming data packets; and

wherein the processor is configured to (1) process the received incoming data packets to depacketize the financial market data messages, (2) process the financial market data of the depacketized financial market data messages to select financial market data according to a criterion, and (3) packetize the selected financial market data to generate a plurality of the outgoing data packets for output via the at least another port, the outgoing data packets comprising criterion-specific outgoing data packets, each criterion-specific outgoing data packet comprising selected financial market data that shares the same criterion, and wherein a plurality of the criterion-specific outgoing data packets group financial market data therein from a plurality of different financial market data feeds.

42. The switch of claim 41 wherein the criterion comprises an identifier for the financial instruments described by the financial market data messages.

43. The switch of claim 41 wherein the criterion comprises which of a plurality of data consumers have an interest in the financial market data.

44. The switch of claim 41 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

45. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports, the ports comprising (1) an input port, (2) a first output port, and (3) a second output port;

switching logic; and

a processor;

wherein the switching logic and processor are co-resident within the intelligent switch;

the input port being configured to receive a plurality of incoming data packets, wherein a plurality of the received incoming data packets correspond to a plurality of financial market data feeds such that a plurality of the received incoming data packets are feed-specific incoming data packets, each of a plurality of the feed-specific incoming data packets comprising a plurality of financial market data messages from the same financial market data, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments including data indicative of a plurality of symbols for the financial instruments to which the financial market data messages pertain;

wherein the processor is configured to (1) process the received incoming data packets to depacketize the financial market data messages, (2) process the financial market data of the depacketized financial market data messages to (i) select financial market data for which the corresponding symbol data falls within a first set of financial instrument symbols as a first group, and (ii) select financial market data for which the corresponding symbol data falls within a second set of financial instrument symbols as a second group, (3) packetize selected financial market data in the first group as a first plurality of outgoing data packets, and (4) packetize selected financial market data in the second group as a second plurality of outgoing data packets; and

wherein the switching logic is configured to (1) direct the first plurality of outgoing data packets for output via the first output port, and (2) direct the second plurality of outgoing data packets for output via the second output port.

46. The switch of claim 45 wherein the input port comprises a plurality of input ports, each input port configured to receive incoming data packets corresponding to different financial market data feeds.

47. The switch of claim 45 wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP).

48. The switch of claim 45 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.

49. An intelligent packet switch for reducing data processing latency at a packet destination by embedding data processing operations that would conventionally be performed at the packet destination into the intelligent packet switch, the switch comprising:

a plurality of ports, the ports comprising (1) an input port, (2) a first output port, and (3) a second output port;

switching logic; and

a processor;

wherein the switching logic and processor are co-resident within the intelligent switch;

the input port being configured to receive a plurality of incoming data packets, wherein a plurality of the received incoming data packets correspond to a plurality of financial market data feeds such that a plurality of the received incoming data packets are feed-specific incoming data packets, each of a plurality of the feed-specific incoming data packets comprising a plurality of financial market data messages from the same financial market data, the financial market data messages comprising data that describes financial market data for a plurality of financial instruments including data indicative of a plurality of symbols for the financial instruments to which the financial market data messages pertain;

wherein the processor is configured to (1) process the received incoming data packets to depacketize the financial market data messages, (2) access an interest list, the interest list associating a plurality of data consumers with a plurality of financial instruments of interest to the data consumers, (3) determine which data consumers are interested in which financial market data from the processed financial market data messages based on (i) the symbol data of the financial market data messages, and (ii) the accessed interest list, and (4) group financial market data together for packetization in outgoing data packets based on which data consumers are determined to have an interest therein such that a plurality of the outgoing data packets are data consumer-specific outgoing data packets, each data consumer-specific outgoing data packet comprising financial market data for financial instruments of interest to the same data consumer; and

wherein the switching logic is further configured to (1) direct the data consumer-specific outgoing data packets corresponding to a first data consumer for output via the first output port, and (2) direct the data consumer-specific outgoing data packets corresponding to a second data consumer for output via the second output port.

50. The switch of claim 49 wherein the input port comprises a plurality of input ports, each input port configured to receive incoming data packets corresponding to different financial market data feeds.

51. The switch of claim 49 wherein the processor comprises at least one member of the group consisting of a reconfigurable logic device, a graphics processor unit (GPU), and a chip multi-processor (CMP).

52. The switch of claim 49 wherein the switch is resident in a data distribution network upstream from a trading platform for financial instruments.