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Programmable logic device and semiconductor device

  • US 10,122,364 B2
  • Filed: 05/05/2016
  • Issued: 11/06/2018
  • Est. Priority Date: 05/25/2012
  • Status: Active Grant
First Claim
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1. A programmable logic device comprising:

  • a plurality of first logic elements arranged in a first column;

    a plurality of second logic elements arranged in a second column;

    a plurality of third logic elements arranged in a third column parallel to the first column and the second column, wherein the second column is positioned between the first column and the third column;

    a plurality of first wirings arranged between the first column and the second column, wherein the plurality of first wirings are electrically connected to corresponding first output terminals of the plurality of second logic elements;

    a plurality of second wirings arranged between the second column and the third column, wherein the plurality of second wirings are electrically connected to corresponding second output terminals of the plurality of second logic elements;

    a plurality of third wirings arranged both between the first column and the second column and between the second column and the third column via one of an upper end and a lower end of the second column, wherein the plurality of third wirings are electrically connected to corresponding first output terminals of the plurality of third logic elements; and

    a plurality of switch circuits arranged between the first column and the second column, the plurality of switch circuits electrically connected to corresponding input terminals of the plurality of second logic elements and electrically connected to each of the plurality of first wirings, the plurality of second wirings, and the plurality of third wirings.

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