Operating system context switching

• US 10,127,073 B2
• Filed: 11/14/2016
• Issued: 11/13/2018
• Est. Priority Date: 04/28/2010
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Acer Cloud Technology, Inc. (Acer, Inc.)
• Inventors: Princen, John, Berndt, Sandra, Cui, Miao, Gamble, Nigel, Ho, Wilson
• Primary Examiner(s): Choudhury, Zahid
• Application Number:
  US15/351,203
• Publication Number:
  US 20170097846A1
• Time in Patent Office: 729 Days
• CPC Class Codes: G06F 9/4406 Loading of operating system
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/461 Saving or restoring of program or task context
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A technique for quickly switching between a first operating system (OS) and a second OS involves deactivating the first OS and loading the second OS from dynamic memory. The technique can include inserting a context switching layer between the first OS and a hardware layer to facilitate context switching. It may be desirable to allocate dynamic memory for the second OS and preserve state of the first OS before deactivating the first OS and loading the second OS from the dynamic memory.

Claims

1. A system comprising:

a hardware layer comprising hardware;

a context switching layer insertion engine;

an operating system (OS) memory allocation engine coupled to the context switching layer insertion engine;

an OS state preservation engine including a processor, the OS state preservation engine coupled to the context switching layer insertion engine;

a memory boot engine including a processor, the memory boot engine coupled to the context switching layer insertion engine;

wherein, in operation;

the OS memory allocation engine allocates first dynamic memory for a first OS and loads first data associated with the first OS into the first dynamic memory, and allocates second dynamic memory for a second OS and loads second data associated with the second OS into the second dynamic memory;

the context switching layer insertion engine receives a switch instruction to switch from the first OS to the second OS, creates, in response to the switch instruction and after the OS memory allocation engine allocates the first dynamic memory and the second dynamic memory, a context switching layer having direct access to the hardware in the hardware layer, and inserts the context switching layer between the first OS and the hardware layer;

the memory boot engine transfers to the second OS the direct access to the hardware, and loads, in response to the switch instruction, the second OS from the second dynamic memory without invoking one or more boot sequences of the second OS.

2. The system of claim 1, wherein the direct access comprises performing a read operation or write operation without use of virtualization.

3. The system of claim 1, wherein the context switching layer comprises a minimalist hypervisor.

4. The system of claim 1, wherein the switch instruction is based on a control signal from the first OS or the second OS, and the hardware layer.

5. The system of claim 1, wherein the context switching layer insertion engine is configured to:

receive a first signal from the first OS or the second OS;

provide a second signal to the hardware layer, the second signal appearing to the hardware layer as if the second signal was coming from the first OS or the second OS.

6. The system of claim 5, wherein the first signal comprises a request for hardware resources from the hardware layer.

7. The system of claim 1, wherein the context switching layer insertion engine is configured to:

receive an indication from the first OS that the first OS is to go to sleep;

intercept a write request from the first OS to the hardware layer;

set, in the hardware layer, a sleep type or sleep enable bits associated with the first OS.

8. The system of claim 7, wherein the write request comprises one or more requests to a power management block of the hardware layer.

9. The system of claim 1, wherein the context switching layer comprises an input/output (I/O) driver configured to enable saving a state of the first OS to a datastore.

10. The system of claim 1, wherein, in operation:

the context switching layer insertion engine inserts another context switching layer between the second OS and the hardware layer;

the OS memory allocation engine allocates third dynamic memory for the first OS and loads data associated with the first OS into the third dynamic memory;

the memory boot engine boots the first OS from the third dynamic memory, thereby restoring the first OS.

11. A method comprising:

allocating first dynamic memory for a first OS;

loading first data associated with the first OS into the first dynamic memory;

allocating second dynamic memory for a second OS;

loading second data associated with the second OS into the second dynamic memory;

receiving a switch instruction to switch from the first OS to the second OS;

creating in response to the switch instruction, and after allocating the first dynamic memory and allocating the second dynamic memory, a context switching layer having direct access to the hardware in the hardware layer;

inserting the context switching layer between the first OS and the hardware layer;

transferring to the second OS the direct access to the hardware;

loading, in response to the switch instruction, the second OS from the second dynamic memory without invoking one or more boot sequences of the second OS.

12. The method of claim 11, wherein the direct access comprises performing a read operation or write operation without use of virtualization.

13. The method of claim 11, wherein the context switching layer comprises a minimalist hypervisor.

14. The method of claim 11, wherein the switch instruction is based on a control signal from the first OS or the second OS, and the hardware layer.

15. The method of claim 11, further comprising:

receiving a first signal from the first OS or the second OS;

providing a second signal to the hardware layer, the second signal appearing to the hardware layer as if the second signal was coming from the first OS or the second OS.

16. The method of claim 15, wherein the first signal comprises a request for hardware resources from the hardware layer.

17. The method of claim 11, further comprising:

receiving an indication from the first OS that the first OS is to go to sleep;

intercepting a write request from the first OS to the hardware layer;

setting, in the hardware layer, a sleep type or sleep enable bits associated with the first OS.

18. The method of claim 17, wherein the write request comprises one or more requests to a power management block of the hardware layer.

19. The method of claim 11, wherein the context switching layer comprises an input/output (I/O) driver configured to enable saving a state of the first OS to a datastore.

20. The method of claim 11, further comprising:

inserting another context switching layer between the second OS and the hardware layer;

allocating third dynamic memory for the first OS and loading data associated with the first OS into the third dynamic memory;

booting the first OS from the third dynamic memory, thereby restoring the first OS.

21. A system comprising:

means for allocating first dynamic memory for a first OS;

means for loading first data associated with the first OS into the first dynamic memory;

means for allocating second dynamic memory for a second OS;

means for loading second data associated with the second OS into the second dynamic memory;

means for receiving a switch instruction to switch from the first OS to the second OS;

means for creating in response to the switch instruction, and after allocating the first dynamic memory and allocating the second dynamic memory, a context switching layer having direct access to the hardware in the hardware layer;

means for inserting the context switching layer between the first OS and the hardware layer;

means for transferring to the second OS the direct access to the hardware;

means for loading, in response to the switch instruction, the second OS from the second dynamic memory without invoking one or more boot sequences of the second OS.