Data storage device comprising super block parity data based on page type of word line or plane

• US 10,127,997 B2
• Filed: 12/28/2015
• Issued: 11/13/2018
• Est. Priority Date: 07/31/2015
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: Baek, Seung Geol, Kim, Seung Hwan, Han, Jong Hee, Koo, Duck Hoi, Son, Ik Joon
• Primary Examiner(s): Schell, Joseph O
• Application Number:
  US14/979,965
• Publication Number:
  US 20170031751A1
• Time in Patent Office: 1,051 Days
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/1072 in multilevel memories
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0655 Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

A data storage device may include a plurality of nonvolatile memory devices including a plurality of blocks and a controller suitable for generating super block parity data for a super block, which is formed of one or more of the plurality of blocks.

Claims

1. A data storage device comprising:

a plurality of nonvolatile memory devices including a plurality of blocks, the plurality of blocks including a plurality of pages accessed through a plurality of word lines, each of the plurality of word lines corresponding to at least a Least Significant Bit (LSB) page and a Most Significant Bit (MSB) page; and

a controller suitable for storing a plurality of data chunks in the plurality of pages, generating first super block parity data for data chunks stored in LSB pages corresponding to even word lines of the plurality of word lines, generating second super block parity data for data chunks stored in MSB pages corresponding to the even word lines, generating third super block parity data for data chunks stored in LSB pages corresponding to odd word lines of the plurality of word lines, and generating forth super block parity data for data chunks stored in MSB pages corresponding to the odd word lines,

wherein the controller includes memories corresponding to different attributes of the plurality of pages, classifies an attribute of a data chunk of the plurality of data chunks as one of the attributes depending on an attribute of a page in which the data chunk is stored, and generates super block parity data regarding the data chunk by calculating new super block parity data based on the data chunk and super block parity data pre-stored in a memory corresponding to the attribute of the data chunk and storing the new super block parity data in the memory.

2. The data storage device according to claim 1, wherein the controller classifies the plurality of data chunks into a plurality of data groups according to an attribute of the plurality of pages, and generates super block parity data for the plurality of respective data groups.

3. The data storage device according to claim 2, wherein the controller corrects an error bit of one of the data chunks classified as a first one of the plurality of data groups based on the other data chunks classified as the first data group and one of the super block parity data for the first data group.

4. The data storage device according to claim 1,

wherein the controller generates stripe parity data corresponding to a plurality of stripes, each of the plurality of stripes includes pages having a same page offset among the plurality of pages in which the plurality of data chunks are stored.

5. The data storage device according to claim 4, wherein the controller generates the first to the forth super block parity data based on the stripe parity data.

6. A data storage device comprising:

a plurality of nonvolatile memory devices including a plurality of blocks, the plurality of blocks including a plurality of pages accessed through a plurality of word lines, each of the plurality of word lines corresponding to at least a Least Significant Bit (LSB) page and a Most Significant Bit (MSB) page, each of the plurality of nonvolatile memory devices including a first plane including a first block of the plurality of blocks and a second plane including a second block of the plurality of blocks; and

a controller suitable for storing a plurality of data chunks in the plurality of pages, generating first super block parity data for data chunks stored in LSB pages of first planes, generating second super block parity data for data chunks stored in MSB pages of the first planes, generating third super block parity data for data chunks stored in LSB pages of second planes, and generating forth super block parity data for data chunks stored in MSB pages of the second planes,

wherein the controller includes memories corresponding to different attributes of the plurality of pages, classifies an attribute of a data chunk of the plurality of data chunks as one of the attributes depending on an attribute of a page in which the data chunk is stored, and generates super block parity data regarding the data chunk by calculating new super block parity data based on the data chunk and super block parity data pre-stored in a memory corresponding to the attribute of the data chunk and storing the new super block parity data in the memory.

7. The data storage device according to claim 6, wherein the controller classifies the plurality of data chunks into a plurality of data groups according to an attribute of the plurality of pages, and generates super block parity data for the plurality of respective data groups.

8. The data storage device according to claim 7, wherein the controller corrects an error bit of one of the data chunks classified as a first one of the plurality of data groups based on the other data chunks classified as the first data group and one of the super block parity data for the first data group.

9. The data storage device according to claim 6, wherein the controller generates stripe parity data corresponding to a plurality of stripes, each of the plurality of stripes includes pages having a same page offset among the plurality of pages in which the plurality of data chunks are stored.

10. The data storage device according to claim 9, wherein the controller generates the first to the forth super block parity data based on the stripe parity data.

11. A data storage device comprising:

a plurality of nonvolatile memory devices including a plurality of blocks, the plurality of blocks including a plurality of pages accessed through a plurality of word lines, each of the plurality of nonvolatile memory devices including a first plane including a first block of the plurality of blocks and a second plane including a second block of the plurality of blocks; and

a controller suitable for storing a plurality of data chunks in the plurality of pages, generating first super block parity data for data chunks stored in pages corresponding to even word lines of first planes, generating second super block parity data for data chunks stored in pages corresponding to odd word lines of the first planes, generating third super block parity data for data chunks stored in pages corresponding to even word lines of second planes, and generating forth super block parity data for data chunks stored in pages corresponding to odd word lines of the second planes,

wherein the controller includes memories corresponding to different attributes of the plurality of pages, classifies an attribute of a data chunk of the plurality of data chunks as one of the attributes depending on an attribute of a page in which the data chunk is stored, and generates super block parity data regarding the data chunk by calculating new super block parity data based on the data chunk and super block parity data pre-stored in a memory corresponding to the attribute of the data chunk and storing the new super block parity data in the memory.

12. The data storage device according to claim 11, wherein the controller classifies the plurality of data chunks into a plurality of data groups according to an attribute of the plurality of pages, and generates super block parity data for the plurality of respective data groups.

13. The data storage device according to claim 12, wherein the controller corrects an error bit of one of the data chunks classified as a first one of the plurality of data groups based on the other data chunks classified as the first data group and one of the super block parity data for the first data group.

14. The data storage device according to claim 11,

wherein the controller generates stripe parity data corresponding to a plurality of stripes, each of the plurality of stripes includes pages having a same page offset among the plurality of pages in which the plurality of data chunks are stored.

15. The data storage device according to claim 14, wherein the controller generates the first to the forth super block parity data based on the stripe parity data.