Trench transistors and methods with low-voltage-drop shunt to body diode

• US 10,128,353 B2
• Filed: 11/10/2017
• Issued: 11/13/2018
• Est. Priority Date: 02/13/2012
• Status: Active Grant

• Current Assignee: MaxPower Semiconductor, Inc. (Vishay Intertechnology Incorporated)
• Original Assignee: MaxPower Semiconductor, Inc. (Vishay Intertechnology Incorporated)
• Inventors: Darwish, Mohamed N., Zeng, Jun, Blanchard, Richard A.
• Primary Examiner(s): Jahan, Bilkis
• Application Number:
  US15/809,863
• Publication Number:
  US 20180138293A1
• Time in Patent Office: 368 Days
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/823412 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823437 with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
• CPC Class Codes: H01L 21/823475 interconnection or wiring or contact manufacturing related aspects
• CPC Class Codes: H01L 21/823487 with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface with a current flow parallel to the substrate surface H01L21/823431
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/36 characterised by the concentration or distribution of impurities in the bulk material within semiconductor regions H01L29/06
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 : with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7395 : Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7803 : structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 : Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H01L 29/7831 : with multiple gate structure FinFETs or MuGFETs H01L29/7855, thin film transistors H01L29/78645
• CPC Class Codes: H01L 29/7835 : with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

Methods and systems for power semiconductor devices integrating multiple trench transistors on a single chip. Multiple power transistors (or active regions) are paralleled, but one transistor has a lower threshold voltage. This reduces the voltage drop when the transistor is forward-biased. In an alternative embodiment, the power device with lower threshold voltage is simply connected as a depletion diode, to thereby shunt the body diodes of the active transistors, without affecting turn-on and ON-state behavior.

Claims

1. A power semiconductor device, comprising:

a first-conductivity-type source region;

a first trench containing a gate electrode which is capacitively coupled to a body region to selectably form a channel region therein;

at least one second trench containing a recessed field plate electrode;

a body contact region which is more heavily doped than said body region;

a plurality of shield regions;

wherein one said shield region is present beneath at least each said second trench;

a source metallization layer which is in ohmic contact with said source region and said body contact region, and which is electrically connected to said gate electrode; and

a backside metallization layer.

2. The device of claim 1, wherein one said shield region is present beneath said first trench.

3. The device of claim 1, wherein said body contact region extends to one said shield region.

4. The device of claim 1, wherein said gate electrode is a split gate electrode.

5. The device of claim 1, wherein said shield regions are second-conductivity-type regions.

6. The device of claim 1, wherein said first trench has a thick bottom oxide.

7. The device of claim 1, wherein said first conductivity type is N type.

8. The device of claim 1, further comprising first and second wherein each said first trench-gated transistors, and wherein each said first trench-gated transistor has a lower threshold voltage than each said second trench-gated transistor.

9. The device of claim 8, further comprising at least one field plate electrode separating said trench-gated transistors.

10. The device of claim 1, further comprising a second-conductivity-type shield region beneath at least one said gate electrode.

11. The device of claim 1, wherein at least one said gate electrode is a split gate electrode.

12. The device of claim 1, constructed in a semiconductor die which is made of silicon.