Display stackups for matrix sensor

• US 10,133,421 B2
• Filed: 03/31/2015
• Issued: 11/20/2018
• Est. Priority Date: 04/02/2014
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Synaptics Incorporated
• Inventors: Shepelev, Petr
• Primary Examiner(s): Kumar, Srilakshmi K
• Assistant Examiner(s): Castiaux, Brent D
• Application Number:
  US14/674,037
• Publication Number:
  US 20150286317A1
• Time in Patent Office: 1,330 Days
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

Capacitive sensing devices that provide short settling time and fast response without creating undesirable visual effects are disclosed herein. In one embodiment, the capacitive sensing device includes a pixel layer stacked with a conductive sensor layer and a metal interconnect layer. The conductive sensor layer has a plurality of sensor electrodes, each of which includes one or more common electrodes. The plurality of sensor electrodes has an areal extent in which an active area of the sensor electrodes is configured to detect input events. The metal interconnect layer is disposed in the active area and includes routing traces. The routing traces are coupled to the plurality of sensor electrodes and extend from within a first region defined by the areal extent of the plurality of sensor electrodes to a second region outward of the areal extent of the plurality of sensor electrodes.

Claims

1. A capacitive sensing device comprising:

a conductive sensor layer having a plurality of sensor electrodes, each of the sensor electrodes comprising one or more common electrodes of a display device configured for display updating and capacitive sensing, the plurality of sensor electrodes having an areal extent defined in a plane of the conductive sensor layer in which an active area of the sensor electrodes is configured to detect input events, the plurality of sensor electrodes arranged in a matrix having columns and rows in a single plane, each row having at least two sensor electrodes of the plurality of sensor electrodes and each column having at least two sensor electrodes of the plurality of sensor electrodes;

a metal interconnect layer disposed in the active area and stacked with the conductive sensor layer, the metal interconnect layer comprising routing traces, each routing trace of the routing traces is respectively coupled to a unique one of the plurality of sensor electrodes through a via forming a plurality of unique routing trace and sensor electrode pairings, the routing traces extending from within a first region defined by the areal extent of the plurality of sensor electrodes of the matrix to a second region outward of the areal extent of the plurality of sensor electrodes of the matrix, each of the plurality of unique routing trace and sensor electrode pairings are independently addressable;

a pixel layer stacked with the conductive sensor layer and the metal interconnect layer, the pixel layer comprising pixel electrodes, the pixel electrodes spaced apart from and aligned with the sensor electrodes of the matrix;

masked regions in which the first region of the sensor electrodes of the matrix resides, the masked regions covering the routing traces of the metal interconnect layer, each of the vias, and a portion of each of the plurality of sensor electrodes; and

a display layer comprising a liquid crystal material disposed above the conductive sensor layer, the metal interconnect layer, the vias, and the pixel layer.

2. The capacitive sensing device of claim 1 further comprising:

a black mask layer stacked with the pixel layer, the conductive sensor layer and the metal interconnect layer, the black mask layer forming the masked regions, the masked regions disposed between adjacent pixel electrodes and adjacent sensor electrodes arranged in the matrix, the sensor electrodes and the pixel electrodes aligned such that a space between the adjacent pixel electrodes overlaps a space between the adjacent sensor electrodes.

3. The capacitive sensing device of claim 1, wherein each of the routing traces has about the same length, and substantially the same resistance or capacitance.

4. The capacitive sensing device of claim 1 further comprising:

a data metal layer stacked with the pixel layer, the conductive sensor layer and the metal interconnect layer, the data metal layer comprising a plurality of source lines disposed in the first region defined by the areal extent of the plurality of sensor electrodes of the matrix, the source lines disposed in a position stacked above or below the routing traces, the source lines covered by the masked regions.

5. The capacitive sensing device of claim 1 further comprising:

a processing system coupled to the plurality of sensor electrodes via the routing traces, the processing system is configured to drive sensing signals onto the routing traces for performing capacitive sensing.

12. The capacitive sensing device of claim 1, wherein

the conductive sensor layer is disposed between the display layer and the metal interconnect layer, the metal interconnect layer is disposed between the conductive sensor layer and the pixel layer.

13. The capacitive sensing device of claim 1, wherein

the pixel layer is disposed between the display layer and the metal interconnect layer, the metal interconnect layer is disposed between the conductive sensor layer and the pixel layer.

14. The capacitive sensing device of claim 1, wherein

the conductive sensor layer is disposed between the display layer and the pixel layer, the pixel layer is disposed between the conductive sensor layer and the metal interconnect layer.

15. The capacitive sensing device of claim 1, where each of the plurality of sensor electrodes comprises a similar size and shape.

16. The capacitive sensing device of claim 1, wherein the vias are formed in the portions of each of the plurality of sensor electrodes covered by the masked regions.

6. A capacitive sensing device comprising:

a display device comprising;

a sensing stack, wherein a plurality of sensor electrodes and a plurality of pixel electrodes are arranged in a matrix, the sensing stack comprising;

a conductive sensor layer having the plurality of sensor electrodes arranged in the matrix comprising at least two rows and at least two columns, each row having at least two sensor electrodes of the plurality of sensor electrodes and each column having at least two sensor electrodes of the plurality of sensor electrodes, each of the sensor electrodes comprising one or more common electrodes of a display device configured for display updating and capacitive sensing, the plurality of sensor electrodes having an areal extent defined in a plane of the conductive sensor layer in which an active area of the sensor electrodes is configured to detect input events;

a metal interconnect layer fabricated from a material having a resistivity lower than a material comprising the conductive sensor layer, the metal interconnect layer comprising routing traces, each routing trace of the routing traces is respectively coupled to a unique one of the plurality of sensor electrodes through a via forming a plurality of unique routing trace and sensor electrode pairings, the routing traces extending from within a first region of the sensing stack defined by the areal extent of the plurality of sensor electrodes of the matrix to a second region of the sensing stack defined outward of the areal extent of the plurality of sensor electrodes of the matrix, each of the plurality of unique routing trace and sensor electrode pairings are independently addressable;

a pixel layer comprising the plurality of pixel electrodes, the pixel electrodes spaced apart from and aligned with the sensor electrodes of the matrix; and

a masked region in which the first region of the sensor electrodes of the matrix resides, the masked region covering the routing traces of the metal interconnect layer, each of the vias, and a portion of each of the plurality of sensor electrodes; and

a display layer having a liquid crystal material disposed above the conductive sensor layer, the metal interconnect layer, the vias, and the pixel layer.

7. The capacitive sensing device of claim 6, wherein the sensing stack further comprises:

a black mask layer having the masked region disposed between adjacent pixel electrodes and adjacent sensor electrodes arranged in the matrix, the sensor electrodes and the pixel electrodes aligned such that a space between the adjacent pixel electrodes overlaps a space between the adjacent sensor electrodes.

8. The capacitive sensing device of claim 6, wherein each of the routing traces has about the same length, and substantially the same resistance or capacitance.

9. The capacitive sensing device of claim 6, wherein adjacent pixel electrodes have at least one or more routing traces disposed therebetween.

10. The capacitive sensing device of claim 6, wherein the sensing stack further comprises:

a data metal layer comprising a plurality of source lines disposed in the first region defined by the areal extent of the plurality of sensor electrodes of the matrix, the source lines stacked above or below the routing traces, the source lines covered by the masked region.

11. The capacitive sensing device of claim 6 further comprising:

an anti-reflective oxide layer forming the masked region and disposed on the routing traces.

17. The capacitive sensing device of claim 6, where each of the plurality of sensor electrodes comprises a similar size and shape.

18. The capacitive sensing device of claim 6, wherein the conductive sensor layer is disposed between the display layer and the pixel layer, the pixel layer is disposed between the conductive sensor layer and the metal interconnect layer.

19. The capacitive sensing device of claim 6, wherein the conductive sensor layer is disposed between the display layer and the metal interconnect layer, the metal interconnect layer is disposed between the conductive sensor layer and the pixel layer.

20. The capacitive sensing device of claim 6, wherein the pixel layer is disposed between the display layer and the metal interconnect layer, the metal interconnect layer is disposed between the conductive sensor layer and the pixel layer.