Display device and electronic device

• US 10,134,912 B2
• Filed: 02/08/2016
• Issued: 11/20/2018
• Est. Priority Date: 09/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kimura, Hajime, Akimoto, Kengo, Tsubuku, Masashi, Sasaki, Toshinari
• Primary Examiner(s): Kohlman, Christopher
• Application Number:
  US15/017,704
• Publication Number:
  US 20160155859A1
• Time in Patent Office: 1,016 Days
• Field of Search: None
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

Claims

1. A display device comprising a first region and a second region,

wherein the first region comprises:

a gate electrode;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the first insulating layer, the oxide semiconductor layer including a channel formation region;

a source electrode and a drain electrode over the oxide semiconductor layer;

a second insulating layer over the source electrode and the drain electrode;

a first conductive layer over the second insulating layer, the first conductive layer comprising indium;

a third insulating layer over the first conductive layer; and

a pixel electrode over the third insulating layer, the pixel electrode electrically connected to one of the source electrode and the drain electrode,

wherein the second region comprises;

a second conductive layer including a same material with the gate electrode;

the first insulating layer over the second conductive layer; and

a third conductive layer over the first insulating layer, the third conductive layer including a same material with the source electrode and the drain electrode,

wherein the pixel electrode comprises indium,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode each comprise a first layer and a second layer,

wherein the first layer comprises indium and oxygen,

wherein the second layer comprises copper,

wherein the first conductive layer overlaps with the channel formation region,

wherein the pixel electrode overlaps with the first conductive layer, and

wherein the second conductive layer and the third conductive layer are electrically connected to each other.

2. The display device according to claim 1, wherein the oxide semiconductor layer includes one of microcrystal and polycrystal.

3. The display device according to claim 1,

wherein the pixel electrode is in contact with the one of the source electrode and the drain electrode in a region, and

wherein the region does not overlap with the oxide semiconductor layer.

4. The display device according to claim 1, wherein the pixel electrode overlaps with the oxide semiconductor layer.

5. The display device according to claim 1, wherein the pixel electrode overlaps with the second conductive layer.

6. The display device according to claim 1, further comprising:

a fourth conductive layer over the second insulating layer, the fourth conductive layer comprising a same material with the first conductive layer,

wherein the fourth conductive layer overlaps with the second conductive layer.

7. The display device according to claim 1, further comprising:

a fourth conductive layer over the second insulating layer, the fourth conductive layer comprising a same material with the first conductive layer,

wherein the fourth conductive layer overlaps with the third conductive layer.

8. A display device comprising a first region and a second region,

wherein the first region comprises:

a gate electrode;

a first insulating layer over the gate electrode;

an oxide semiconductor layer over the first insulating layer, the oxide semiconductor layer including a channel formation region;

a source electrode and a drain electrode over the oxide semiconductor layer;

a second insulating layer over the source electrode and the drain electrode;

a first conductive layer over the second insulating layer, the first conductive layer comprising indium;

a third insulating layer over the first conductive layer; and

a pixel electrode over the third insulating layer, the pixel electrode electrically connected to one of the source electrode and the drain electrode,

wherein the second region comprises;

a second conductive layer including a same material with the gate electrode;

the first insulating layer over the second conductive layer; and

a third conductive layer over the first insulating layer, the third conductive layer including a same material with the source electrode and the drain electrode,

wherein the pixel electrode comprises indium,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode each comprises a first layer and a second layer,

wherein the first layer comprises indium and oxygen,

wherein the second layer comprises copper,

wherein the first conductive layer overlaps with the channel formation region,

wherein the pixel electrode overlaps with the first conductive layer,

wherein the pixel electrode is electrically connected to the one of the source electrode and the drain electrode through a contact hole in the second insulating layer,

wherein the contact hole overlaps with the oxide semiconductor layer, and

wherein the second conductive layer and the third conductive layer are electrically connected to each other.

9. The display device according to claim 8, wherein the oxide semiconductor layer includes one of microcrystal and polycrystal.

10. The display device according to claim 8, wherein the pixel electrode overlaps with the oxide semiconductor layer.

11. The display device according to claim 8, wherein the pixel electrode overlaps with the second conductive layer.

12. The display device according to claim 8, further comprising:

a fourth conductive layer over the second insulating layer, the fourth conductive layer comprising a same material with the first conductive layer,

wherein the fourth conductive layer overlaps with the second conductive layer.

13. The display device according to claim 8, further comprising:

a fourth conductive layer over the second insulating layer, the fourth conductive layer comprising a same material with the first conductive layer,

wherein the fourth conductive layer overlaps with the third conductive layer.