Self-authenticating chips
First Claim
1. A self-authenticating integrated circuit chip comprising:
- one or more memory circuits on the integrated circuit, the one or more memory circuits providing a first memory region storing a first authentication code;
a second memory region storing a second authentication code;
a comparator circuit on the integrated circuit interconnected to at least said second memory region for providing an indicator of whether a given input to said comparator circuit matches said second authentication code stored in said second memory region;
wherein said second authentication code within said second memory region cannot be extracted or modified by said integrated circuit or a chip reader and may only be accessed by said comparator to compare the given input to said comparator to said second authentication code; and
an authentication circuit on the integrated circuit interconnected to said comparator and at least one of said one or more memory circuits wherein said authentication circuit is operable to;
read said first authentication code from said first memory region;
present said first authentication code to said comparator; and
in response to receiving an indicator from said comparator indicating that said first authentication code matches said second authentication codeunlock a communication interface of said chip to allow data to be transmitted therethrough to a chip reader or unlock a third memory region of the integrated circuit.
2 Assignments
0 Petitions
Accused Products
Abstract
A self-authenticating chip includes first and second memory regions storing, respectively, first and second authentication codes. The second memory region is adapted to be unreadable and unmodifiable by the chip or a chip reader. The chip also includes a comparator for providing an indicator of whether given input matches the second authentication code. The chip also includes an authentication circuit that is operable to read the first authentication code from the first memory region, present the first authentication code to the comparator, and in response to receiving an indicator from the comparator indicating that the first and second authentication codes match, unlock at least one of (i) a communication interface of the chip to allow data to be transmitted therethrough to a chip reader and (ii) a third memory region of the chip to allow data to be read therefrom.
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Citations
18 Claims
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1. A self-authenticating integrated circuit chip comprising:
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one or more memory circuits on the integrated circuit, the one or more memory circuits providing a first memory region storing a first authentication code; a second memory region storing a second authentication code; a comparator circuit on the integrated circuit interconnected to at least said second memory region for providing an indicator of whether a given input to said comparator circuit matches said second authentication code stored in said second memory region; wherein said second authentication code within said second memory region cannot be extracted or modified by said integrated circuit or a chip reader and may only be accessed by said comparator to compare the given input to said comparator to said second authentication code; and an authentication circuit on the integrated circuit interconnected to said comparator and at least one of said one or more memory circuits wherein said authentication circuit is operable to; read said first authentication code from said first memory region; present said first authentication code to said comparator; and in response to receiving an indicator from said comparator indicating that said first authentication code matches said second authentication code unlock a communication interface of said chip to allow data to be transmitted therethrough to a chip reader or unlock a third memory region of the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of operating a self-authenticating card, said self-authenticating card comprising:
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a card body; a first chip mounted to said card body and having a first memory region storing a first authentication code, and a communication interface for communicating with a chip reader; a second chip substantially sealed within said card body and having a second memory region storing a second authentication code; at least one of said first and second chips providing an authentication circuit interconnected with said first memory region and said second memory region; wherein said second authentication code be read cannot be modified by said first or second chip or a chip reader and may only be accessed by said authentication circuit to compare said first authentication code to said second authentication code; said method comprising; reading said first authentication code from said first memory region; reading said second authentication code from said second memory region; authenticating said card by comparing said first authentication code with said second authentication code; and upon said authenticating; unlocking said communication interface to allow data to be transmitted therethrough or unlocking a third memory region to allow data to be read therefrom. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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Specification