Method for driving a semiconductor device including data migration between a volatile memory and a nonvolatile memory for power-saving

• US 10,141,053 B2
• Filed: 04/29/2014
• Issued: 11/27/2018
• Est. Priority Date: 04/30/2013
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Toyotaka, Kouhei
• Primary Examiner(s): Huynh, Kim
• Assistant Examiner(s): Chan, Danny
• Application Number:
  US14/264,359
• Publication Number:
  US 20140325249A1
• Time in Patent Office: 1,673 Days
• Field of Search: None
• CPC Class Codes: G06F 1/3268 Power saving in hard disk drive
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G11C 14/0018 whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

To reduce power consumption of a processing device including a processor and a main memory in the processor. The main memory includes not only a volatile memory such as a DRAM but also a nonvolatile memory. The processor monitors access requirements to the main memory. The processor determines on the basis of the monitoring results whether the volatile memory or the nonvolatile memory operates mainly. In the case where the main memory changes from the volatile memory to the nonvolatile memory, part or all of data stored in the volatile memory is backed up to the nonvolatile memory. While the nonvolatile memory operates mainly, supply of power supply voltage to the volatile memory is stopped or power supply voltage to be supplied is lowered.

Claims

1. A method for driving a semiconductor device including a volatile memory and a nonvolatile memory, the method comprising the steps of:

operating the volatile memory with a normal mode;

monitoring access requirements to the volatile memory and detecting an access frequency of the volatile memory;

comparing a used space of the volatile memory and an available space of the nonvolatile memory when the access frequency of the volatile memory is smaller than a first set value;

forwarding data stored in the volatile memory to the nonvolatile memory when the used space of the volatile memory is smaller than the available space of the nonvolatile memory;

changing the volatile memory from the normal mode to a stop mode;

monitoring access requirements to the nonvolatile memory and measuring a data transferring speed of the nonvolatile memory;

returning the volatile memory from the stop mode to the normal mode when the data transferring speed of the nonvolatile memory is higher than a second set value; and

forwarding part of data in the volatile memory to the nonvolatile memory when an available space of the volatile memory is smaller than a third set value,

wherein the third set value is configured to be changed depending on temperature of the volatile memory;

wherein the normal mode is a mode supplying a first power supply voltage to the volatile memory, and

wherein the stop mode is a mode not supplying any power supply voltage to the volatile memory.

2. The method for driving the semiconductor device according to claim 1, further comprising the steps of:

forwarding part of data in the volatile memory to the nonvolatile memory when the used space of the volatile memory is larger than the available space of the nonvolatile memory;

operating the volatile memory with a power saving mode;

monitoring access requirements to the nonvolatile memory and determining whether data required to be read is written to the nonvolatile memory; and

returning the volatile memory from the power saving mode to the normal mode when the data required to be read is not written to the nonvolatile memory,

wherein the power saving mode is a mode supplying a second power supply voltage to the volatile memory, and

wherein the first power supply voltage is higher than the second power supply voltage.

3. The method for driving the semiconductor device according to claim 2, further comprising the step of returning the volatile memory from the power saving mode to the normal mode when the available space of the nonvolatile memory is smaller than a size of data required to be written.

4. The method for driving the semiconductor device according to claim 1,

wherein the volatile memory is DRAM,

wherein the access frequency of the volatile memory is time intervals between access requirements to the DRAM, and

wherein refresh intervals of DRAM is applied as the first set value.

5. The method for driving the semiconductor device according to claim 1, wherein the first set value is configured to be changed depending on temperature of the volatile memory.

6. The method for driving the semiconductor device according to claim 1, wherein the second set value is configured to be changed depending on temperature of the volatile memory.

7. The method for driving the semiconductor device according to claim 1, wherein all the data stored in the in the volatile memory is forwarded to the nonvolatile memory.