DC-DC converter with a dynamically adapting load-line

• US 10,141,841 B1
• Filed: 08/30/2017
• Issued: 11/27/2018
• Est. Priority Date: 08/30/2017
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Ongaro, Fabio, Couleur, Michael
• Primary Examiner(s): Zweizig, Jeffery S
• Application Number:
  US15/691,472
• Time in Patent Office: 454 Days
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/305 in the event of power-supply fluctuations
• CPC Class Codes: H02M 1/0045 Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
• CPC Class Codes: H02M 1/0048 Circuits or arrangements for reducing losses using snubbers H02M1/34
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output
• CPC Class Codes: H02M 3/155 using semiconductor devices only
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H03F 2200/129 there being a feedback over the complete amplifier
• CPC Class Codes: H03F 3/213 in integrated circuits
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Systems, apparatuses, and methods for efficiently generating a stable output for a transient load for one or more components are described. In various embodiments, a power converter includes two feedback loops to separate the stability and the equivalent output resistance, which allows the bandwidth to increase. The first loop includes a compensator receiving an output current of an amplifier. Additionally, a first converter and a first current mirror generate a target current based on the output current of the amplifier. Based on the target current, multiple step-down converters generate an output voltage, which is returned to the amplifier through a resistor. The second loop includes a second converter with a first order series RC filter to reduce the second loop'"'"'s response time. A second current mirror receives current from the second converter and generates a dynamically adapting feedback current, which flows through the resistor in the first loop.

Claims

1. A power converter comprising:

an amplifier configured to convey an output current;

a first loop comprising;

a compensator configured to generate a first voltage based on the output current;

first circuitry configured to;

generate an output voltage based on the first voltage; and

convey the output voltage to an input of the amplifier; and

a second loop comprising second circuitry configured to;

generate a dynamically adapting feedback current based on the first voltage; and

convey the dynamically adapting feedback current to the input of the amplifier.

2. The power converter as recited in claim 1, wherein the amplifier is an operational transconductance amplifier (OTA) and the compensator is a Type II compensator for the OTA.

3. The power converter as recited in claim 1, wherein the first circuitry comprises:

a first current mirror configured to generate each of a first reference current and a target current based on the first reference current; and

a plurality of step-down converters configured to;

receive the target current; and

generate the output voltage on an output node based at least in part on the target current.

4. The power converter as recited in claim 3, wherein the first circuitry further comprises a resistor connected to the output node and the input of the amplifier, wherein the dynamically adapting feedback current creates a voltage drop across the resistor between the input of the amplifier and the output voltage.

5. The power converter as recited in claim 1, wherein the second circuitry comprises:

a second current mirror comprising;

a diode-connected transistor configured to generate a second reference current;

a plurality of current source transistors, each connected to a switch, wherein one or more of the plurality of current source transistors connected to closed switches generate the dynamically adapting feedback current based on the second reference current.

6. The power converter as recited in claim 5, wherein the second circuitry comprises a second converter comprising:

a first order series resistor-capacitor (RC) filter configured to receive the first voltage, wherein the RC filter creates a response time of the second loop that is greater than a response time of the first loop; and

a transistor with a drain terminal connected to the diode-connected transistor and a gate terminal connected to an output of the RC filter.

7. The power converter as recited in claim 5, wherein the second circuitry further comprises control logic configured to open and close the switches for one or more of the plurality of current source transistors to increase the dynamically adapting feedback current in response to determining a difference between the output voltage and a target voltage is increasing.

8. The power converter as recited in claim 7, wherein the control logic is further configured to open and close the switches for one or more of the plurality of current source transistors to decrease the dynamically adapting feedback current in response to detecting a difference between the output voltage and a target voltage is decreasing.

9. A method comprising:

conveying an output current from an amplifier;

generating, by a compensator, a first voltage based on the output current;

first circuitry for;

generating an output voltage based on the first voltage; and

conveying the output voltage to an input of the amplifier; and

second circuitry for;

generating a dynamically adapting feedback current based on the first voltage; and

conveying the dynamically adapting feedback current to the input of the amplifier.

10. The method as recited in claim 9, wherein the amplifier is an operational transconductance amplifier (OTA) and the compensator is a Type II compensator for the OTA.

11. The method as recited in claim 9, wherein the first circuitry comprises:

a first current mirror for generating each of a first reference current and a target current based on the first reference current; and

a plurality of step-down converters for;

receiving the target current; and

generating the output voltage on an output node based at least in part on the target current.

12. The method as recited in claim 11, wherein the first circuitry further comprises a resistor connected to the output node and the input of the amplifier, wherein the dynamically adapting feedback current creates a voltage drop across the resistor between the input of the amplifier and the output voltage.

13. The method as recited in claim 9, wherein the second circuitry comprises:

a second current mirror comprising;

a diode-connected transistor for generating a second reference current;

a plurality of current source transistors, each connected to a switch, wherein one or more of the plurality of current source transistors connected to closed switches generate the dynamically adapting feedback current based on the second reference current.

14. The method as recited in claim 13, wherein the second circuitry comprises a second converter comprising:

a first order series resistor-capacitor (RC) filter for receiving the first voltage, wherein the RC filter creates a response time of the second loop that is greater than a response time of the first loop; and

a transistor with a drain terminal connected to the diode-connected transistor and a gate terminal connected to an output of the RC filter.

15. A system on a chip comprising:

a primary converter configured to convert an external voltage to an internal voltage;

a plurality of functional units; and

a power converter configured to generate an output voltage based on at least the internal voltage to one or more of the plurality of functional units, wherein the power converter comprises;

an amplifier configured to convey an output current;

a first loop comprising;

a compensator configured to generate a first voltage based on the output current;

first circuitry configured to;

generate the output voltage based on the first voltage; and

convey the output voltage to an input of the amplifier; and

a second loop comprising;

second circuitry configured to;

generate a dynamically adapting feedback current based on the first voltage; and

convey the dynamically adapting feedback current to the input of the amplifier.

16. The system on a chip as recited in claim 15, wherein the amplifier is an operational transconductance amplifier (OTA) and the compensator is a Type II compensator for the OTA.

17. The system on a chip as recited in claim 15, wherein the first circuitry comprises:

a first current mirror configured to generate each of a first reference current and a target current based on the first reference current; and

a plurality of step-down converters configured to;

receive the target current; and

generate the output voltage on an output node based at least in part on the target current.

18. The system on a chip as recited in claim 17, wherein the first circuitry further comprises a resistor connected to the output node and the input of the amplifier, wherein the dynamically adapting feedback current creates a voltage drop across the resistor between the input of the amplifier and the output voltage.

19. The system on a chip as recited in claim 15, wherein the second circuitry comprises:

a second current mirror comprising;

a diode-connected transistor configured to generate a second reference current;

a plurality of current source transistors, each connected to a switch, wherein one or more of the plurality of current source transistors connected to closed switches generate the dynamically adapting feedback current based on the second reference current.

20. The system on a chip as recited in claim 19, wherein the second circuitry comprises a second converter comprising:

a first order series resistor-capacitor (RC) filter configured to receive the first voltage, wherein the RC filter creates a response time of the second loop that is greater than a response time of the first loop; and

a transistor with a drain terminal connected to the diode-connected transistor and a gate terminal connected to an output of the RC filter.