Dynamic intrinsic chip identification
First Claim
1. A method for intrinsic chip identification, comprising:
- receiving first counter information from a device;
determining whether the first counter information matches second counter information;
enabling authentication in response to the first counter information matching the second counter information;
receiving a first set of frequencies from the device, wherein the first set of frequencies are selected based on the first counter information;
determining whether each frequency of the first set of frequencies is within a predetermined range of a corresponding frequency of a second set of frequencies, wherein the second set of frequencies are selected based on the second counter information;
selecting a challenge response pair comprising a challenge and a response as a result of each frequency of the first set of frequencies being within the predetermined range of a corresponding frequency of the second set of frequencies;
transmitting the challenge to the device in response to selecting the challenge response pair;
receiving the response as a result of the challenge being sent to the device;
determining whether the response matches an expected response; and
granting authentication as a result of the response matching the expected response.
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Accused Products
Abstract
An apparatus, method, system, and program product are disclosed for intrinsic chip identification. One method includes receiving first counter information from a device, determining whether such information matches second counter information, receiving first frequencies from the device, determining whether each frequency of such frequencies is within a predetermined range of a corresponding frequency of second frequencies, receiving a response to a challenge sent to the device, determining whether the response matches an expected response, and granting authentication. Granting authentication may include granting authentication in response to: the first counter information matching the second counter information; each frequency of the first frequencies being within the predetermined range of a corresponding frequency of the second frequencies; and the expected response matching the response. The expected response may be updated over time. The security apparatus may include circuitry that is shared with circuitry outside the security apparatus for computations other than authentication.
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Citations
15 Claims
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1. A method for intrinsic chip identification, comprising:
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receiving first counter information from a device; determining whether the first counter information matches second counter information; enabling authentication in response to the first counter information matching the second counter information; receiving a first set of frequencies from the device, wherein the first set of frequencies are selected based on the first counter information; determining whether each frequency of the first set of frequencies is within a predetermined range of a corresponding frequency of a second set of frequencies, wherein the second set of frequencies are selected based on the second counter information; selecting a challenge response pair comprising a challenge and a response as a result of each frequency of the first set of frequencies being within the predetermined range of a corresponding frequency of the second set of frequencies; transmitting the challenge to the device in response to selecting the challenge response pair; receiving the response as a result of the challenge being sent to the device; determining whether the response matches an expected response; and granting authentication as a result of the response matching the expected response. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A system comprising:
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a processor; a first memory having program instructions embodied therewith, the program instructions executable by the processor; and a security apparatus comprising circuitry configured to perform a physically unclonable function (“
PUF”
), wherein the circuitry comprises a first counter and a second counter, a first set of frequencies are selected based on the first counter, a second set of frequencies are selected based on the second counter, a challenge response pair is selected as a result of each frequency of the first set of frequencies being within a predetermined range of a corresponding frequency of the second set of frequencies, and authentications are enabled in response to the first counter matching the second counter and each frequency of the first set of frequencies being within a predetermined range of a corresponding frequency of the second set of frequencies;wherein the system uses the security apparatus to perform authentications and the processor uses the security apparatus for computations while the security apparatus is not being used to perform authentications. - View Dependent Claims (15)
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Specification