Sensor self-diagnostics using multiple signal paths

• US 10,145,882 B2
• Filed: 04/19/2016
• Issued: 12/04/2018
• Est. Priority Date: 09/24/2010
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Rasbornig, Friedrich, Motz, Mario, Hammerschmidt, Dirk, Gastinger, Ferdinand, Schaffer, Bernhard, Granig, Wolfgang
• Primary Examiner(s): McAndrew, Christopher P
• Application Number:
  US15/132,783
• Publication Number:
  US 20160231371A1
• Time in Patent Office: 959 Days
• Field of Search: 3247503
• CPC Class Codes: B60T 2250/06 Sensor zero-point adjustment; Offset compensation
• CPC Class Codes: B60T 2270/406 Test-mode; Self-diagnosis
• CPC Class Codes: B60T 2270/411 Offset failure
• CPC Class Codes: B60T 2270/413 Plausibility monitoring, cross check, redundancy
• CPC Class Codes: B60T 8/885 using electrical circuitry
• CPC Class Codes: G01D 3/08 with provision for safeguarding the apparatus, e.g. against abnormal operation, against breakdown
• CPC Class Codes: G01R 31/007 using microprocessors or computers
• CPC Class Codes: G01R 31/2644 Adaptations of individual semiconductor devices to facilitate the testing thereof
• CPC Class Codes: G01R 31/2829 Testing of circuits in sensor or actuator systems testing of apparatus for measuring electric or magnetic variables G01R35/00; testing of indicating or recording apparatus G01D; in airbag systems B60R21/0173; checking gas analysers G01N33/007; monitoring or fail-safe circuits for electromagnets H01F7/1844
• CPC Class Codes: G01R 31/2856 Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
• CPC Class Codes: G01R 31/2884 using dedicated test connectors, test elements or test circuits on the IC under test G01R31/2855 takes precedence

Abstract

Embodiments relate to systems and methods for sensor self-diagnostics using multiple signal paths. In an embodiment, the sensors are magnetic field sensors, and the systems and/or methods are configured to meet or exceed relevant safety or other industry standards, such as SIL standards. For example, a monolithic integrated circuit sensor system implemented on a single semiconductor ship can include a first sensor device having a first signal path for a first sensor signal on a semiconductor chip; and a second sensor device having a second signal path for a second sensor signal on the semiconductor chip, the second signal path distinct from the first signal path, wherein a comparison of the first signal path signal and the second signal path signal provides a sensor system self-test.

Claims

1. A monolithic integrated circuit comprising:

a first sensor device configured to indicate a physical quantity, the first sensor device having a first signal path for a first sensor signal on a semiconductor chip; and

a second sensor device configured to indicate the physical quantity, the second sensor device having a second signal path for a second sensor signal on the semiconductor chip, the second signal

path separate and distinct from the first signal path and, when compared with the first signal path, having at least one characteristic selected from the group consisting of being of a lower sampling rate, higher latency time, lower bandwidth, less precise, having more noise, a smaller analog-to-digital conversion resolution, and a smaller signal range,

wherein the second sensor device comprises fewer second sensing elements than the first sensor device comprises first sensing elements, the second sensor device comprises second sensing elements of a smaller second sensitive area than the first sensor device comprises first sensing elements of a first sensing area, has a different working principle, different signal encodings, different mapping of sensor signals, different compensation algorithms, and a different processing schedule, and

wherein a first output signal related to the first signal path and a second output signal related to the second signal path are communicable from the monolithic integrated circuit to an external control unit.

2. The monolithic integrated circuit of claim 1, wherein the different working principle is implemented for a functional portion of the first signal path as a hardware implementation, while a corresponding functional portion of the second signal path is implemented as software.

3. The monolithic integrated circuit of claim 1, wherein the different working principle is implemented using a different sensing technology for the first signal path than for the second signal path.

4. The monolithic integrated circuit of claim 1, wherein the different working principle is implemented by employing for a first functional portion of the first signal path a functional processing hardware that is at least in part different from a second functional portion of the second signal path corresponding to the first functional portion.

5. The monolithic integrated circuit of claim 1, further comprising:

a digital signal processor (DSP) on the semiconductor chip and coupled to the first and second signal paths to receive the first and second signal path signals, wherein the DSP is configured to compare the first and second signal path signals.

6. The monolithic integrated circuit of claim 5, wherein the DSP comprises a first digital signal processing portion associated with the first signal path and a second digital signal processing portion associated with the second signal path.

7. The monolithic integrated circuit of claim 5, wherein the DSP is coupled to the first and second signal paths by an analog-to-digital (A/D) conversion channel cross-switching device.

8. The monolithic integrated circuit of claim 1, further comprising:

at least one additional sensor device coupled to one of the first signal path and the second signal path.

9. The monolithic integrated circuit of claim 8, wherein the at least one additional sensor device is selected from the group consisting of a temperature sensor, a stress sensor, a current sensor, a voltage sensor, and a magnetic field sensor.

10. The monolithic integrated circuit of claim 8, further comprising:

a multiplexer on the semiconductor chip configured to couple the second sensor device and the at least one additional sensor device to the selected one of the first and second signal paths.

11. The monolithic integrated circuit of claim 1, wherein the first and second sensor devices comprise magnetic field sensors.

12. The monolithic integrated circuit of claim 1, further comprising:

a first biasing circuit coupled to the first sensor device and the first signal path, and a second biasing circuit coupled to the second sensor device and the second signal path.

13. The monolithic integrated circuit of claim 12, further comprising:

a biasing comparator configured to receive a first biasing signal from the first biasing circuit and a second biasing signal from the second biasing circuit and to compare the first and second biasing signals.

24. The monolithic integrated circuit of claim 2, wherein the external control unit is configured to provide an alert in response to the communicable first and second output signals being received and compared by the external control unit.

31. The monolithic integrated circuit of claim 1, wherein the first output signal and the second output signal are communicable from the monolithic integrated circuit to the external control unit for a comparison.

32. The monolithic integrated circuit of claim 31, wherein the comparison comprises at least one of identification of an error or deviation in the monolithic integrated circuit, a plausibility check of at least one of the sensors, the signal paths, or the DSPs, or a verification of at least one of the sensors, the signal paths, or the DSPs.

33. The monolithic integrated circuit of claim 31, wherein the comparison comprises forming at least one of a quotient, a linear transformation of the first output signal and the second output signal, a comparison of an absolute difference between the first output signal and the second output signal against a difference threshold.

35. The monolithic integrated circuit of claim 1, wherein the first signal path comprises a first analog-to-digital (A/D) converter and the second signal path comprises a second A/D converter different from the first A/D converter, and the first output signal related to the first signal path from the first A/D converter and the second output signal related to the second signal path from the second A/D converter are communicable from the monolithic integrated circuit to the external control unit.

36. The monolithic integrated circuit of claim 35, wherein the first A/D converter operates with at least one working principle distinct from a working principle of the second A/D converter.

37. The monolithic integrated circuit of claim 5, wherein the DSP comprises a first digital signal processing portion associated with only the first signal path and a second digital signal processing portion associated with only the second signal path.

14. A method of monitoring a monolithic integrated circuit comprising:

implementing, on a single semiconductor chip, a main signal path comprising a main sensor;

implementing, on the single semiconductor chip, a secondary sensor and a secondary signal path, the secondary signal path separate and distinct from the main signal path and, when compared with the main signal path, having at least one characteristic selected from the group consisting of being of a lower sampling rate, higher latency time, lower bandwidth, less precise, having more noise, smaller analog-to-digital conversion resolution, smaller signal range, and a different working principle,

wherein the secondary sensor comprises fewer second sensing elements than the main sensor comprises first sensing elements, the secondary sensor comprises second sensing elements of a smaller second sensitive area than the main sensor comprises first sensing elements of a first sensing area, different working principle, different signal encodings, different mapping of sensor signals, different compensation algorithms, and different processing schedule;

providing the signal of the main signal path as a first output signal and the signal of the secondary signal path as a second output signal; and

comparing the first output signal and the second output signal.

15. The method of claim 14, further comprising multiplexing at least one additional sensor to the secondary signal path.

16. The method of claim 15, further comprising receiving at least one compensation signal from the at least one additional sensor.

17. The method of claim 14, further comprising:

biasing the main sensor by a first biasing portion;

biasing the secondary sensor by a second biasing portion different from the first biasing portion; and

measuring a biasing current of the main sensor and a biasing current of the secondary sensor.

18. The method of claim 14, further comprising:

coupling the main and secondary signal paths to a digital signal processor (DSP);

processing the signal of the main signal path using a first software portion of the DSP to determine the first output signal; and

processing the signal of the secondary signal path using a second software portion of the DSP to determine the second output signal, the second software portion different from the first software portion.

19. The method of claim 18, further comprising:

providing parallel outputs of the DSP comprising a main signal path portion and a secondary signal path portion.

20. The method of claim 14, wherein the comparing comprises forming at least one of a quotient or a linear transformation of the signal of the main signal path and the signal of the secondary signal path.

21. The method of claim 20, further comprising evaluating the at least one quotient or linear transformation.

22. The method of claim 14, further comprising:

adjusting a measurement range of a selected one of the main sensor or the secondary sensor, while a measurement range for the non-selected one of the main sensor or the secondary sensor remains unaltered.

23. The method of claim 14, further comprising exchanging the main sensor and the secondary sensor such that the main sensor is coupled to the secondary signal path and the secondary sensor is coupled to the main signal path.

25. The method of claim 19, further comprising:

providing the first output signal by the main signal path portion; and

providing the second output signal by the secondary signal path portion.

26. The method of claim 18, further comprising:

providing the first output signal by an output portion; and

providing the second output signal by the output portion using a time multiplexing scheme.

27. The method of claim 25, further comprising coupling the parallel outputs of the DSP to an external control unit.

28. The method of claim 26, further comprising providing an alert by the external control unit as a result of the comparing.

29. The method of claim 14, wherein the comparing is carried out an the single semiconductor chip.

30. The method of claim 14, further comprising providing as a result of the comparing at least one of:

identification of an error or deviation in the monolithic integrated circuit;

a plausibility check of at least one of the sensors, the signal paths, or the DSPs;

or

a verification of at least one of the sensors, the signal paths, or the DSP.

34. The method of claim 14, further comprising:

implementing a first analog-to-digital (A/D) conversion technique on the main signal path; and

implementing a second A/D conversion technique on the secondary signal path, the second A/D conversion technique being different from the first A/D conversion technique.

38. The monolithic integrated circuit of claim 18, wherein the external control unit is configured to receive and compare the communicable first and second output signals.