Method and apparatus for managing global chip power on a multicore system on chip
First Claim
1. A method for controlling power consumption in a multi-core processor chip, the method comprising:
- accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip, the accumulating including sending a read command from the controller to at least one core processor of the multiple core processors and wherein a core processor receiving the read command updates a parameter value representing a cumulative sum of power estimates to produce an updated cumulative sum and forwards the read command with the updated cumulative sum to one other core processor or to the controller;
determining a cumulative power estimate based at least in part on the one or more power estimates accumulated;
determining a global power threshold based on the cumulative power estimate determined and a corresponding average over time, relative to a desired target power; and
causing power consumption at each core processor to be controlled based on the global power threshold determined.
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Abstract
According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.
41 Citations
28 Claims
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1. A method for controlling power consumption in a multi-core processor chip, the method comprising:
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accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip, the accumulating including sending a read command from the controller to at least one core processor of the multiple core processors and wherein a core processor receiving the read command updates a parameter value representing a cumulative sum of power estimates to produce an updated cumulative sum and forwards the read command with the updated cumulative sum to one other core processor or to the controller; determining a cumulative power estimate based at least in part on the one or more power estimates accumulated; determining a global power threshold based on the cumulative power estimate determined and a corresponding average over time, relative to a desired target power; and causing power consumption at each core processor to be controlled based on the global power threshold determined. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A multi-core processor chip comprising:
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multiple core processors; and a controller coupled to at least one of the multiple core processors, the controller configured to; accumulate one or more power estimates associated with the multiple core processors within the multi-core processor chip, wherein in accumulating the one or more power estimates associated with the multiple core processors, the controller is configured to send a read command from the controller to at least one core processor of the multiple core processors and wherein the at least one core processor is configured to; receive the read command; update a parameter value representing a cumulative sum of power estimates to produce an updated cumulative sum; and forward the read command with the updated cumulative sum to one other core processor or to the controller; determine a cumulative power estimate based at least in part on the one or more power estimates accumulated; determine a global power threshold based on the cumulative power estimate determined and a corresponding average over time, relative to a desired target power; and cause power consumption at each core processor to be controlled based on the global power threshold determined. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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Specification