Semiconductor device comprising oxide semiconductor

• US 10,153,378 B2
• Filed: 09/11/2015
• Issued: 12/11/2018
• Est. Priority Date: 07/22/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Takahashi, Masahiro, Honda, Tatsuya, Hatano, Takehisa
• Primary Examiner(s): Erdem, Fazli
• Assistant Examiner(s): Wilson, Scott R
• Application Number:
  US14/851,119
• Publication Number:
  US 20160005877A1
• Time in Patent Office: 1,187 Days
• Field of Search: None
• CPC Class Codes: H01L 29/00 Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor H01L31/00 - H01L33/00, H10K10/00, H10N take precedence; details other than of semiconductor bodies or of electrodes thereof H01L23/00; devices consisting of a plurality of solid state components formed in or on a common substrate H01L27/00
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/12 characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/20 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 29/22 including, apart from doping materials or other impurities, only AIIBVI compounds
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/26 including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24 , e.g. alloys
• CPC Class Codes: H01L 29/772 Field effect transistors
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer including a channel formation region; and

a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,

wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,

wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,

wherein the composition ratio of zinc is larger than the composition ratio of gallium,

wherein each of the composition ratios is represented by atomic percentage, and

wherein the oxide semiconductor layer includes a c-axis aligned crystal region.

2. The semiconductor device according to claim 1, wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.

3. The semiconductor device according to claim 1, wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.

4. The semiconductor device according to claim 1, further comprising a transistor including a channel formation region comprising silicon.

5. A semiconductor device comprising:

an oxide semiconductor layer including a channel formation region; and

a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,

wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,

wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,

wherein each of the composition ratios is represented by atomic percentage, and

wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium;

gallium;

zinc=3;

1;

2.

6. The semiconductor device according to claim 5, wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.

7. The semiconductor device according to claim 5, wherein the oxide semiconductor layer includes a c-axis aligned crystal region.

8. The semiconductor device according to claim 5, wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.

9. The semiconductor device according to claim 5, further comprising a transistor including a channel formation region comprising silicon.

10. A semiconductor device comprising:

an oxide semiconductor layer including a channel formation region; and

a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,

wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,

wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,

wherein the composition ratio of zinc is larger than the composition ratio of gallium,

wherein each of the composition ratios is represented by atomic percentage, and

wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium;

gallium;

zinc=3;

1;

2.

11. The semiconductor device according to claim 10, wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.

12. The semiconductor device according to claim 10, wherein the oxide semiconductor layer includes a c-axis aligned crystal region.

13. The semiconductor device according to claim 10, wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.

14. The semiconductor device according to claim 10, further comprising a transistor including a channel formation region comprising silicon.

15. A semiconductor device comprising:

a transistor including a channel formation region comprising silicon, the transistor including a first gate electrode layer;

an oxide semiconductor layer including a channel formation region, the oxide semiconductor layer being electrically connected to the first gate electrode layer; and

a second gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,

wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,

wherein a composition ratio of indium is larger than a composition ratio of zinc,

wherein the composition ratio of zinc is larger than a composition ratio of gallium, and

wherein each of the composition ratios is represented by atomic percentage.

16. The semiconductor device according to claim 15, wherein a region of the oxide semiconductor layer which does not overlap with the second gate electrode layer includes a dopant.

17. The semiconductor device according to claim 15, wherein a sidewall insulating layer is provided on a side surface of the second gate electrode layer.

18. The semiconductor device according to claim 15, wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:

gallium;

zinc=3;

1;

2.

19. The semiconductor device according to claim 15, wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:

gallium;

zinc=4;

2;

3.