Group III nitride wafers and fabrication method and testing method

• US 10,156,530 B2
• Filed: 07/22/2015
• Issued: 12/18/2018
• Est. Priority Date: 04/07/2006
• Status: Active Grant

• Current Assignee: Seoul Semiconductor Co., Ltd.
• Original Assignee: Seoul Semiconductor Co., Ltd., SixPoint Materials, Inc.
• Inventors: Hashimoto, Tadao
• Primary Examiner(s): Mayes, Melvin C.
• Assistant Examiner(s): Forrest, Michael
• Application Number:
  US14/806,644
• Publication Number:
  US 20150330919A1
• Time in Patent Office: 1,245 Days
• Field of Search: None
• CPC Class Codes: B24B 37/044 characterised by the composition of the lapping agent
• CPC Class Codes: C01B 21/0632 with gallium, indium or thallium
• CPC Class Codes: C01P 2002/74 by peak-intensities or a ratio thereof only
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: C30B 33/00 After-treatment of single crystals or homogeneous polycrystalline material with defined structure C30B31/00 takes precedence
• CPC Class Codes: C30B 33/06 Joining of crystals
• CPC Class Codes: C30B 7/105 using ammonia as solvent, i.e. ammonothermal processes
• CPC Class Codes: G01N 23/207 Diffractometry using detectors, e.g. using a probe in a central position and one or more displaceable detectors in circumferential positions
• CPC Class Codes: H01L 21/0201 Specific process step
• CPC Class Codes: H01L 21/30625 With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The invention provides, in one instance, a group III nitride wafer sliced from a group III nitride ingot, polished to remove the surface damage layer and tested with x-ray diffraction. The x-ray incident beam is irradiated at an angle less than 15 degree and diffraction peak intensity is evaluated. The group III nitride wafer passing this test has sufficient surface quality for device fabrication. The invention also provides, in one instance, a method of producing group III nitride wafer by slicing a group III nitride ingot, polishing at least one surface of the wafer, and testing the surface quality with x-ray diffraction having an incident beam angle less than 15 degree to the surface. The invention also provides, in an instance, a test method for testing the surface quality of group III nitride wafers using x-ray diffraction having an incident beam angle less than 15 degree to the surface.

Claims

1. A method of testing surface damage of a first wafer of group III nitride wafers sliced from a bulk group III nitride crystal comprising measuring an X-ray diffraction peak of the wafer from 114 plane of the group III nitride with an incident beam at an angle less than 15 degrees to the damaged surface.

2. A method according to claim 1, wherein peak intensity of the X-ray diffraction peak with the incident beam at said angle less than 15 degrees to the damaged surface is compared with a peak intensity of a diffraction peak with an incident beam at an angle more than 15 degree to the damaged surface.

3. A method according to claim 1, wherein the wafer has a surface (a) oriented with c-plane or (b) misoriented from the c-plane, and wherein said surface misorientation is within +/−

10 degrees.

4. A method according to claim 2, wherein the peak intensity of the diffraction peak from 114 plane is compared with the peak intensity of the diffraction peak from 002 plane.

5. A method according to claim 4, and further comprising verifying that the peak intensity of the diffraction peak from 114 plane is more than 1/100 of the peak intensity of the diffraction peak from 002 plane.

6. A method according to claim 1 wherein the X-ray diffraction peak indicates that the wafer requires removal of the surface damage.

7. A method according to claim 4 wherein the X-ray diffraction peak from 114 plane indicates that the wafer requires removal of the surface damage.

8. A method according to claim 5 wherein the X-ray diffraction peak from 114 plane indicates that the wafer requires removal of the surface damage.

9. A method according to claim 1 wherein the X-ray diffraction peak indicates the degree of removal of the surface damage.

10. A method according to claim 4 wherein the X-ray diffraction peak from 114 plane indicates the degree of removal of the surface damage.

11. A method according to claim 5 wherein the X-ray diffraction peak from 114 plane indicates the degree of removal of the surface damage.

12. A method according to claim 1 wherein the diffraction geometry is asymmetric.

13. A method according to claim 3 wherein the diffraction geometry is asymmetric.

14. A method according to claim 1, wherein group III nitride comprises gallium nitride.

15. A method according to claim 2, wherein group III nitride comprises gallium nitride.

16. A method according to claim 3, wherein group III nitride comprises gallium nitride.

17. A method according to claim 4, wherein group III nitride comprises gallium nitride.

18. A method according to claim 5, wherein group III nitride comprises gallium nitride.

19. A method according to claim 1, wherein the wafer is selected from the group consisting of m-, a-, 101, 102, 103, 111, 112 and 113 base plane oriented wafers, wherein the wafer has a surface (a) oriented with the base-plane or (b) misoriented from the base-plane, and wherein said surface misorientation is within +/−

10 degrees.