Pixel driver circuitry for a display device

• US 10,157,572 B2
• Filed: 04/04/2017
• Issued: 12/18/2018
• Est. Priority Date: 11/01/2016
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: InnoLux Corporation
• Inventors: Lee, Kuan-Feng, Wu, Yu-Hsien
• Primary Examiner(s): Amadiz, Rodney
• Application Number:
  US15/478,874
• Publication Number:
  US 20180122298A1
• Time in Patent Office: 623 Days
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10K 59/121 characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

A display device comprises a first LED coupled with an input node, and further comprises pixel driver circuitry. The pixel driver circuitry comprises a data input transistor configured to conduct, based on a first control signal, a data signal across a first channel having a first channel W/L ratio. The pixel driver circuitry further comprises a drive transistor configured to conduct, based on the data signal, current across a second channel into the input node. The second channel has a second channel W/L ratio. The pixel driver circuitry further comprises a reset transistor configured to conduct, based on a received second control signal, a first reference voltage signal across a third channel into the input node. The third channel has a third channel W/L ratio. At least one of the first channel W/L ratio, the second channel W/L ratio, and the third channel W/L ratio is different.

Claims

1. A display device comprising:

at least a first light emitting diode coupled with an input node; and

pixel driver circuitry comprising;

a data input transistor comprising a first control terminal configured to receive a first control signal, wherein the data input transistor is configured to conduct, based on the first control signal, a data signal across a first channel of the data input transistor having a first channel width-to-length (W/L) ratio;

a drive transistor comprising a second control terminal configured to receive the data signal from the data input transistor, wherein the drive transistor is configured to conduct, based on the data signal, current across a second channel of the drive transistor into the input node, wherein the second channel has a second channel W/L ratio; and

a reset transistor comprising a third control terminal configured to receive a second control signal, wherein the reset transistor is configured to conduct, based on the second control signal, a first reference voltage signal across a third channel of the reset transistor into the input node, wherein the third channel has a third channel W/L ratio,

wherein at least one of the first channel W/L ratio, the second channel W/L ratio, and the third channel W/L ratio is different;

wherein the pixel driver circuitry further comprises;

an emission transistor comprising a fourth control terminal configured to receive a third control signal for selectively enabling current conduction across the second channel of the drive transistor;

a compensation transistor comprising a fifth control terminal configured to receive a fourth control signal, wherein the compensation transistor is configured to couple, based on the second control signal, the emission transistor with a second reference voltage across a fifth channel.

2. The display device of claim 1, wherein the second channel W/L ratio of the drive transistor is smaller than the first channel W/L ratio and is smaller than the third channel W/L ratio.

3. The display device of claim 1, wherein at least one of the data input transistor, the drive transistor, and the reset transistor has a dual gate structure.

4. The display device of claim 3, wherein the drive transistor has a dual gate structure comprising:

a first gate terminal configured to receive the data signal; and

a second gate terminal configured to receive the third control signal for selectively coupling the drive transistor with a supply voltage.

5. The display device of claim 1, wherein the second channel of the drive transistor is formed within an oxide semiconductor layer.

6. The display device of claim 5, wherein at least one of the first channel and the third channel are also formed within the oxide semiconductor layer.

7. The display device of claim 5,

wherein the emission transistor is formed within a semiconductor layer.

8. The display device of claim 1, wherein the pixel driver circuitry further comprises:

a first storage capacitor coupled between the second control terminal and the input node.

9. The display device of claim 8, wherein the pixel driver circuitry further comprises:

a second storage capacitor coupled between a supply voltage and the input node.

10. The display device of claim 8, further comprising:

a substrate,

wherein the drive transistor overlaps a first region of the substrate and the first storage capacitor overlaps a second region of the substrate, and

wherein the first light emitting diode is overlaps at least one of the first region and the second region.

11. The display device of claim 8, wherein the first light emitting diode is directly bonded to a portion of the drive transistor formed from a metal layer.

12. The display device of claim 1, wherein the emission transistor is configured to couple, based on the third control signal, the drive transistor with a supply voltage across a fourth channel.

13. The display device of claim 1, further comprising:

a substrate, wherein the pixel driver circuitry overlaps a first region of the substrate; and

gate driver circuitry overlapping a second region of the substrate,

wherein the first light emitting diode comprises;

a first terminal coupled with the input node; and

a second terminal coupled with a common voltage node overlapping the second region.

14. The display device of claim 13, wherein at least a portion of the gate driver circuitry is disposed outside an active region of the display device.

15. The display device of claim 14, further comprising:

a conductive ring configured to substantially circumscribe the active region,

wherein the gate driver circuitry and a cathode of the first light emitting diode are coupled with the conductive ring.

16. The display device of claim 15, further comprising:

a plurality of conductive lines extending across the active region and coupled with the conductive ring, wherein a first width of each conductive line of the plurality of conductive lines is smaller than a second width of the conductive ring.

17. The display device of claim 16, wherein each conductive line defines a respective first end and a respective second end, and

wherein each first end and each second end are coupled with the conductive ring.

18. The display device of claim 1, wherein the first light emitting diode comprises:

a first terminal coupled with the input node; and

a second terminal configured to receive a common voltage signal from circuitry other than the pixel driver circuitry.