Semiconductor device including oxide semiconductor stacked layers

• US 10,158,026 B2
• Filed: 09/12/2016
• Issued: 12/18/2018
• Est. Priority Date: 04/13/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Matsubayashi, Daisuke, Murayama, Keisuke
• Primary Examiner(s): MAZUMDER, DIDARUL A
• Application Number:
  US15/262,547
• Publication Number:
  US 20160380108A1
• Time in Patent Office: 827 Days
• Field of Search: 257 43, 438 85, 438 86, 438104, 438754
• CPC Class Codes: H01L 29/7831 with multiple gate structure FinFETs or MuGFETs H01L29/7855, thin film transistors H01L29/78645
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

Claims

1. A semiconductor device comprising:

a first gate electrode layer over an insulating surface;

oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer, the oxide semiconductor stacked layers overlap with the first gate electrode layer with a first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers;

a source electrode layer and a drain electrode layer over the second oxide semiconductor layer;

a second insulating layer over and in direct contact with an upper surface of the second oxide semiconductor layer between the source electrode layer and the drain electrode layer; and

wherein the second oxide semiconductor layer includes;

a first region in direct contact with the second insulating layer; and

a second region in direct contact with the source electrode layer,

wherein a thickness of the first region is smaller than a thickness of the second region,

wherein the first oxide semiconductor layer comprises indium and gallium,

wherein the second oxide semiconductor layer comprises indium and gallium,

wherein an indium content is lower than or equal to a gallium content in the second oxide semiconductor layer,

wherein the first oxide semiconductor layer comprises a first crystal region,

wherein the second oxide semiconductor layer comprises a second crystal region,

wherein a crystallinity of the first crystal region is different from a crystallinity of the second crystal region, and

wherein a c-axis of a crystal in the second crystal region is parallel to a normal vector of the upper surface of the second oxide semiconductor layer.

2. The semiconductor device according to claim 1,

wherein an indium content is higher than a gallium content in the first oxide semiconductor layer.

3. The semiconductor device according to claim 1, wherein a thickness of a portion of the oxide semiconductor stacked layers has a thickness of more than or equal to 3 nm and less than 20 nm, the portion being between the source electrode layer and the drain electrode layer.

4. The semiconductor device according to claim 1, further comprising a second gate electrode layer overlapping with the oxide semiconductor stacked layers with the second insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers,

wherein the second gate electrode layer extends beyond edges of the oxide semiconductor stacked layers.

5. The semiconductor device according to claim 4, wherein at least one of the first gate electrode layer and the second gate electrode layer is a conductive layer having a work function of 5 eV or more.

6. The semiconductor device according to claim 4, wherein at least one of the first gate electrode layer and the second gate electrode layer is an In—

Ga—

Zn—

O film comprising nitrogen.

7. A semiconductor device comprising:

a first gate electrode layer over an insulating surface;

oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer, the oxide semiconductor stacked layers overlap with the first gate electrode layer with a first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers;

a source electrode layer and a drain electrode layer over the second oxide semiconductor layer;

a second insulating layer over and in direct contact with an upper surface of the second oxide semiconductor layer between the source electrode layer and the drain electrode layer; and

wherein the second oxide semiconductor layer includes;

a first region in direct contact with the second insulating layer; and

a second region in direct contact with the source electrode layer,

wherein a thickness of the first region is smaller than a thickness of the second region,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer contain same constituent elements and have different compositions of the constituent elements,

wherein the first oxide semiconductor layer comprises indium and gallium,

wherein the second oxide semiconductor layer comprises indium and gallium,

wherein an indium content is lower than or equal to a gallium content in the second oxide semiconductor layer,

wherein the first oxide semiconductor layer comprises a first crystal region,

wherein the second oxide semiconductor layer comprises a second crystal region,

wherein a crystallinity of the first crystal region is different from a crystallinity of the second crystal region, and

wherein a c-axis of a crystal in the second crystal region is parallel to a normal vector of the upper surface of the second oxide semiconductor layer.

8. The semiconductor device according to claim 7,

wherein an indium content is higher than a gallium content in the first oxide semiconductor layer.

9. The semiconductor device according to claim 7, wherein a thickness of a portion of the oxide semiconductor stacked layers has a thickness of more than or equal to 3 nm and less than 20 nm, the portion being between the source electrode layer and the drain electrode layer.

10. The semiconductor device according to claim 7, further comprising a second gate electrode layer overlapping with the oxide semiconductor stacked layers with the second insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers,

wherein the second gate electrode layer extends beyond edges of the oxide semiconductor stacked layers.

11. The semiconductor device according to claim 10, wherein at least one of the first gate electrode layer and the second gate electrode layer is a conductive layer having a work function of 5 eV or more.

12. The semiconductor device according to claim 10, wherein at least one of the first gate electrode layer and the second gate electrode layer is an In—

Ga—

Zn—

O film comprising nitrogen.

13. A semiconductor device comprising:

a first gate electrode layer over an insulating surface;

oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer, the oxide semiconductor stacked layers overlap with the first gate electrode layer with a first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers;

a source electrode layer and a drain electrode layer over the second oxide semiconductor layer;

a second insulating layer over and in direct contact with an upper surface of the second oxide semiconductor layer between the source electrode layer and the drain electrode layer; and

wherein the second oxide semiconductor layer includes;

a first region in direct contact with the second insulating layer; and

a second region in direct contact with the source electrode layer,

wherein a thickness of the first region is smaller than a thickness of the second region,

wherein the first oxide semiconductor layer comprises indium and gallium,

wherein the second oxide semiconductor layer comprises indium and gallium,

wherein an indium content is lower than or equal to a gallium content in the second oxide semiconductor layer,

wherein the first oxide semiconductor layer comprises a first crystal region,

wherein the second oxide semiconductor layer comprises a second crystal region,

wherein a crystallinity of the first crystal region is different from a crystallinity of the second crystal region, and

wherein a c-axis of a crystal in the second crystal region is substantially parallel to a normal vector of the upper surface of the second oxide semiconductor layer at a location of the crystal.

14. The semiconductor device according to claim 13,

wherein an indium content is higher than a gallium content in the first oxide semiconductor layer.

15. The semiconductor device according to claim 13, wherein a thickness of a portion of the oxide semiconductor stacked layers has a thickness of more than or equal to 3 nm and less than 20 nm, the portion being between the source electrode layer and the drain electrode layer.

16. The semiconductor device according to claim 13, further comprising a second gate electrode layer overlapping with the oxide semiconductor stacked layers with the second insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers,

wherein the second gate electrode layer extends beyond edges of the oxide semiconductor stacked layers.

17. The semiconductor device according to claim 16, wherein at least one of the first gate electrode layer and the second gate electrode layer is a conductive layer having a work function of 5 eV or more.

18. The semiconductor device according to claim 16, wherein at least one of the first gate electrode layer and the second gate electrode layer is an In—

Ga—

Zn—

O film comprising nitrogen.

19. A semiconductor device comprising:

a first gate electrode layer over an insulating surface;

oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer, the oxide semiconductor stacked layers overlap with the first gate electrode layer with a first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers;

a source electrode layer and a drain electrode layer over the second oxide semiconductor layer;

a second insulating layer over and in direct contact with an upper surface of the second oxide semiconductor layer between the source electrode layer and the drain electrode layer; and

wherein the second oxide semiconductor layer includes;

a first region in direct contact with the second insulating layer; and

a second region in direct contact with the source electrode layer,

wherein a thickness of the first region is smaller than a thickness of the second region,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer contain same constituent elements and have different compositions of the constituent elements,

wherein the first oxide semiconductor layer comprises indium and gallium,

wherein the second oxide semiconductor layer comprises indium and gallium,

wherein an indium content is lower than or equal to a gallium content in the second oxide semiconductor layer,

wherein the first oxide semiconductor layer comprises a first crystal region,

wherein the second oxide semiconductor layer comprises a second crystal region,

wherein a crystallinity of the first crystal region is different from a crystallinity of the second crystal region, and

wherein a c-axis of a crystal in the second crystal region is substantially parallel to a normal vector of the upper surface of the second oxide semiconductor layer at a location of the crystal.

20. The semiconductor device according to claim 19,

wherein an indium content is higher than a gallium content in the first oxide semiconductor layer.

21. The semiconductor device according to claim 19, wherein a thickness of a portion of the oxide semiconductor stacked layers has a thickness of more than or equal to 3 nm and less than 20 nm, the portion being between the source electrode layer and the drain electrode layer.

22. The semiconductor device according to claim 19, further comprising a second gate electrode layer overlapping with the oxide semiconductor stacked layers with the second insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers,

wherein the second gate electrode layer extends beyond edges of the oxide semiconductor stacked layers.

23. The semiconductor device according to claim 22, wherein at least one of the first gate electrode layer and the second gate electrode layer is a conductive layer having a work function of 5 eV or more.

24. The semiconductor device according to claim 22, wherein at least one of the first gate electrode layer and the second gate electrode layer is an In—

Ga—

Zn—

O film comprising nitrogen.