Semiconductor structure for MEMS Device

• US 10,160,639 B2
• Filed: 06/27/2016
• Issued: 12/25/2018
• Est. Priority Date: 06/27/2016
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Yu-Chia, Chu, Chia-Hua, Cheng, Chun-Wen, Peng, Jung-Huei
• Primary Examiner(s): Muse, Ismail A
• Application Number:
  US15/193,410
• Publication Number:
  US 20170369308A1
• Time in Patent Office: 911 Days
• CPC Class Codes: B81C 1/00238 Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
• CPC Class Codes: B81C 2203/0785 Transfer and j oin technology, i.e. forming the electronic processing unit and the micromechanical structure on separate substrates and joining the substrates

Abstract

The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.

Claims

1. A structure for a microelectromechanical systems (MEMS) device, the structure comprising:

an interlayer dielectric (ILD) region positioned over a substrate;

an inter-metal dielectric (IMD) region positioned over the ILD region, wherein the IMD region is comprised of a passivation layer overlying a stacked structure, wherein the stacked structure alternates between dielectric layers and etch stop layers, and wherein metal wire layers are disposed within the stacked structure of the IMD region;

one or more electrode extension vias comprising a conductive material arranged within the IMD region and contacting an upper metal wire layer;

an electrode layer having sensing electrodes and bonding electrodes that are positioned over the one or more electrode extension vias and that have lower surfaces directly contacting the passivation layer;

a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned directly over and vertically separated from a first sensing electrode of the sensing electrodes, wherein the MEMS substrate is bonded to the IMD region by a bonding structure; and

wherein the bonding structure is electrically connected to the MEMS substrate and the bonding structure is further electrically connected to the metal wire layers of the IMD region by a second electrode extension via that extends through the passivation layer.

2. The structure of claim 1, wherein the passivation layer continuously extends between a bottom surface contacting the upper metal wire layer and a top surface contacting the sensing electrodes and the bonding electrodes.

3. The structure of claim 1, wherein the passivation layer is silicon nitride.

4. The structure of claim 1, wherein the etch stop layers are comprised of a same material as the passivation layer.

5. The structure of claim 1, wherein the MEMS device is positioned above the passivation layer to form a cavity above the first sensing electrode, wherein a vertical distance between the first sensing electrode and a lowermost surface of the MEMS substrate in the cavity is defined as a sensing gap.

6. The structure of claim 5, wherein the second electrode extension via extends completely through the passivation layer.

7. The structure of claim 1, wherein the bonding structure comprises an electrically conductive layer disposed between a bonding electrode and a metalloid layer.

8. The structure of claim 7, wherein the bonding electrode is laterally spaced from the first sensing electrode.

9. The structure of claim 7, wherein the bonding electrode forms a sidewall of a cavity, and wherein the cavity is arranged around the first sensing electrode.

10. The structure of claim 1, wherein the first sensing electrode has angled sidewalls that cause a width of the first sensing electrode to decrease as a distance from the substrate increases.

11. A structure for a microelectromechanical systems (MEMS) device, the structure comprising:

an interlayer dielectric (ILD) region positioned over a substrate;

an inter-metal dielectric (IMD) region positioned over the ILD region, wherein the IMD region is comprised of a passivation layer overlying a stacked structure, wherein the stacked structure alternates between dielectric layers and etch stop layers, and wherein metal wire layers are disposed within the stacked structure of the IMD region; and

a sensing electrode electrically connected to the IMD region with an electrode extension via, wherein the sensing electrode is positioned directly below and vertically separated from a MEMS device such that a cavity is formed between the sensing electrode and the MEMS device; and

a pair of bonding structures electrically connected to the MEMS device and separated from sides of the sensing electrode by a non-zero gap, wherein the pair of bonding structures forms cavity sidewalls of the cavity, wherein each bonding structure comprises an electrically conductive layer disposed between a bonding electrode and a metalloid layer, and wherein the MEMS device is separated from the sensing electrode by a distance substantially equal to a combined height of the electrically conductive layer and the metalloid layer.

12. The structure of claim 11, wherein a sensing gap is arranged between the sensing electrode and a lowermost surface of the MEMS device.

13. The structure of claim 11, further comprising:

one or more electrode extension vias comprising a conductive material arranged within the IMD region and contacting an upper metal wire layer; and

an electrode layer having sensing electrodes and bonding electrodes positioned over the one or more electrode extension vias and having lower surfaces that directly contact the passivation layer.

14. A structure, comprising:

an inter-metal dielectric (IMD) region arranged over a semiconductor substrate, wherein the IMD region comprises a silicon nitride passivation layer overlying a stacked structure, wherein the stacked structure alternates between dielectric layers and etch stop layers, wherein metal wire layers are disposed within the stacked structure of the IMD region, and wherein the silicon nitride passivation layer includes an opening exposing an upper metal wire layer of the IMD region;

a conductive material arranged within the opening to form one or more electrode extension vias;

an electrode layer having electrodes that have lower surfaces that directly contact the silicon nitride passivation layer, wherein the electrodes include sensing electrodes and bonding electrodes positioned over the one or more electrode extension vias, wherein the silicon nitride passivation layer continuously extends between a bottom surface contacting the upper metal wire layer and a top surface contacting the sensing electrodes and the bonding electrodes;

a MEMS substrate electrically coupled to the bonding electrodes and having soft mechanical structures configured to move in a direction normal to upper surfaces of the sensing electrodes, wherein the soft mechanical structures are directly over and vertically separated from the sensing electrodes; and

a carrier substrate separated from the silicon nitride passivation layer by the MEMS substrate.

15. The structure of claim 14, wherein the silicon nitride passivation layer comprises a bottommost surface that directly contacts a topmost dielectric layer within the IMD region and the upper metal wire layer.

16. The structure of claim 14, wherein the sensing electrodes are electrically connected to the one or more electrode extension vias.

17. The structure of claim 14, wherein the carrier substrate comprises one or more cavities arranged directly over the sensing electrodes.

18. The structure of claim 14, wherein the metal wire layers comprise copper and the one or more electrode extension vias comprise tungsten.

19. The structure of claim 14, wherein the sensing electrodes comprise titanium or tantalum.

20. The structure of claim 14, wherein the bonding electrodes form cavity sidewalls of a cavity, and wherein the cavity is arranged around a sensing electrode.