Apparatus and method of three dimensional conductive lines
First Claim
Patent Images
1. An inter-tier memory column, comprising:
- a first segment disposed within a first tier of a three-dimensional integrated circuit (3D IC), said first segment comprising a first bit line comprising a first bit line part disposed along a first axis and a second bit line part connected to said first part and horizontally offset from said first axis;
a second segment disposed within a second tier of said 3D IC, comprising a second bit line comprising a third bit line part disposed along a second axis and a fourth bit line part connected to said third bit line part and disposed perpendicular to said second axis; and
wherein said first bit line is electrically connected to said second bit line by a conductive member extending continuously from said first bit line to said second bit line.
1 Assignment
0 Petitions
Accused Products
Abstract
An apparatus and method of three dimensional conductive lines comprising a first memory column segment in a first tier, a second memory column segment in a second tier, and conductive lines connecting the first memory column segment to the second memory column segment. In some embodiments a conductive line is disposed in the first tier on a first side of the memory column and in the second tier on a second side of the memory column.
23 Citations
20 Claims
-
1. An inter-tier memory column, comprising:
-
a first segment disposed within a first tier of a three-dimensional integrated circuit (3D IC), said first segment comprising a first bit line comprising a first bit line part disposed along a first axis and a second bit line part connected to said first part and horizontally offset from said first axis; a second segment disposed within a second tier of said 3D IC, comprising a second bit line comprising a third bit line part disposed along a second axis and a fourth bit line part connected to said third bit line part and disposed perpendicular to said second axis; and wherein said first bit line is electrically connected to said second bit line by a conductive member extending continuously from said first bit line to said second bit line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. An inter-tier memory column, comprising:
-
a first segment disposed within a first tier of a three-dimensional integrated circuit (3D IC), said first segment comprising a first bit line comprising a first bit line part disposed along a first axis and a second bit line part connected to said first part and horizontally offset from said first axis, and a first plurality of memory cells electrically connected to said first bit line; a second segment disposed within a second tier of said 3D IC, comprising a second bit line comprising a third bit line part disposed along a second axis and a fourth bit line part connected to said third part and disposed perpendicular to said second axis, and a second plurality of memory cells electrically connected to said second bit line; wherein said horizontally offset second bit line part is connected to said perpendicular fourth bit line part by a first vertical conductive member. - View Dependent Claims (12, 13, 14, 15, 16)
-
-
17. A method of forming an inter-tier memory column, comprising:
-
forming a first segment in a first tier of a three-dimensional integrated circuit (3D IC), said first segment comprising a first bit line comprising a first bit line part disposed along a first axis and a second bit line part connected to said first part and horizontally offset from said first axis; forming a second segment disposed within a second tier of the 3D IC, said second segment comprising a second segment disposed within a second tier of said 3D IC, comprising a second bit line comprising a third bit line part disposed along a second axis and a fourth bit line part connected to said third part and disposed perpendicular to said second axis; and connecting said horizontally offset second bit line part to said perpendicular fourth bit line part with a first vertical conductive element. - View Dependent Claims (18, 19, 20)
-
Specification