Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction
First Claim
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1. A processor for executing software instructions, the processor comprising:
- a plurality of processing queues that process the software instructions and provide out-of-order processing of the software instructions when specified conditions are satisfied;
an instruction sequencing unit circuit that determines a sequence of the software instructions executed by the processor, wherein the instruction sequencing unit circuit comprises a most favored instruction circuit that selects an instruction as the most favored instruction (MFI) and communicates the MFI to the plurality of processing queues; and
wherein at least one of the plurality of processing queues comprises a plurality of slots that receive any instruction that is not the most favored instruction when written to one of the plurality of slots, and a dedicated slot for processing the MFI, wherein the dedicated slot cannot process any instruction that is not the MFI.
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Abstract
An instruction sequencing unit in an out-of-order (OOO) processor includes a Most Favored Instruction (MFI) mechanism that designates an instruction as an MFI. The processing queues in the processor identify when they contain the MFI, and assures processing the MFI. The MFI remains the MFI until it is completed or is flushed, and which time the MFI mechanism selects the next MFI.
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Citations
12 Claims
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1. A processor for executing software instructions, the processor comprising:
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a plurality of processing queues that process the software instructions and provide out-of-order processing of the software instructions when specified conditions are satisfied; an instruction sequencing unit circuit that determines a sequence of the software instructions executed by the processor, wherein the instruction sequencing unit circuit comprises a most favored instruction circuit that selects an instruction as the most favored instruction (MFI) and communicates the MFI to the plurality of processing queues; and wherein at least one of the plurality of processing queues comprises a plurality of slots that receive any instruction that is not the most favored instruction when written to one of the plurality of slots, and a dedicated slot for processing the MFI, wherein the dedicated slot cannot process any instruction that is not the MFI. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for executing software instructions in a computer program by a processor, the method comprising the steps of:
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providing in the processor a plurality of processing queues that process the software instructions and provide out-of-order processing of the software instructions when specified conditions are satisfied; providing an instruction sequencing unit circuit that determines a sequence of the software instructions executed by the processor, wherein the instruction sequencing unit circuit selects an instruction as the most favored instruction (MFI) and communicates the MFI to the plurality of processing queues; providing a plurality of slots in at least one of the plurality of processing queues, wherein the plurality of slots receive any instruction that is not the most favored instruction when written to one of the plurality of slots; and providing a dedicated slot for processing the MFI in the at least one of the plurality of processing queues, wherein the dedicated slot cannot process any instruction that is not the MFI. - View Dependent Claims (8, 9, 10, 11, 12)
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Specification