Non-volatile memory including selective error correction
First Claim
1. An apparatus comprising:
- a first memory area included in a memory device and a second memory area included in the memory device, the first and second memory area selectively coupled to each other through a conductive path in the memory device; and
control circuitry included in the memory device to communicate with a memory controller, the memory controller including an error correction engine, the control circuitry of the memory device configured to retrieve first information stored in the first memory area and store the first information after the error correction engine performs an error detection operation on the first information, and to retrieve second information stored in the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information such that the error correction engine skips performing an additional error detection operation on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
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Accused Products
Abstract
Some embodiments include apparatuses and methods using a first memory area and a second memory area included a memory device, and using control circuitry included in the memory device to communicate with a memory controller. The memory controller includes an error correction engine. The control circuitry of the memory device is configured to retrieve the first information from the first memory area and store in the first information after the error correction engine performs an error detection operation on the first information. The control circuitry is configured to retrieve second information from the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition.
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Citations
32 Claims
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1. An apparatus comprising:
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a first memory area included in a memory device and a second memory area included in the memory device, the first and second memory area selectively coupled to each other through a conductive path in the memory device; and control circuitry included in the memory device to communicate with a memory controller, the memory controller including an error correction engine, the control circuitry of the memory device configured to retrieve first information stored in the first memory area and store the first information after the error correction engine performs an error detection operation on the first information, and to retrieve second information stored in the first memory area and store the second information in the second memory area without an additional error detection operation performed on the second information such that the error correction engine skips performing an additional error detection operation on the second information if a result from the error detection operation performed by the error correction engine on the first information meets a threshold condition. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An apparatus comprising:
a memory controller to communicate with a memory device, the memory controller including an error correction engine, the memory controller configured to; use the error correction engine to perform an error detection operation on first information stored in a first memory area of the memory device to detect any errors in the first information and to determine whether detected errors meet a threshold condition after the error detection operation; store the first information in a second memory area of the memory device after the error detection operation; skip performing an additional error detection operation on second information if a result from the error detection operation performed on the first information meets a threshold condition; and provide an indication to the memory device to allow the memory device to retrieve the second information from the first memory area and store the second information in the second memory area. - View Dependent Claims (12, 13, 14, 15, 16)
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17. An apparatus comprising:
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a memory device including first memory cells and second memory cells, each of the first memory cells configured to store at least one bit of information, each of the second memory cells configured to store up to multiple bits of information; and a memory controller coupled to the memory device, the memory controller including an error correction engine, the memory controller configured to use the error correction engine to perform an operation to determine whether first information retrieved from the first memory cells has an error, to skip performing an additional error detection operation on second information based on a result of the operation performed on the first information, and to allow the memory device to retrieve the second information from the first memory cells and store the second information in the second memory cells. - View Dependent Claims (18, 19, 20, 21, 22)
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23. An apparatus comprising:
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a host; and a solid state drive (SSD) including non-volatile memory cells, the SSD including a host interface coupled to the host, a memory controller coupled to the host interface, memory controller including an error correction engine, and a memory device coupled to the memory controller, the memory device including a first memory unit and a second memory unit, the first memory unit including first memory cells, the second memory unit including second memory cells, each of the first memory cells configured to store at least one bit of information, each of the second memory cells configured to store up to multiple bits of information, the memory controller configured to use the error correction engine to perform an operation to determine whether first information retrieved from the first memory cells has an error, to skip performing an additional error detection operation on second information based on a result of the operation performed on the first information, and to allow the memory device to retrieve the second information from the first memory cells and store the second information in the second memory cells. - View Dependent Claims (24, 25, 26, 27)
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28. A method comprising:
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retrieving first information stored in a first memory area of a memory device; performing an error detection operation on the first information to determine whether the first information has an error; storing the first information in a second memory area of the memory device after the error detection operation is performed on the first information; skipping an additional error detection operation to be performed on second information based on a result of the error detection operation performed on the first information; retrieving second information from the first memory area; and storing the second information in the second memory area. - View Dependent Claims (29, 30, 31, 32)
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Specification