Data storage and method of operating the same

• US 10,170,198 B2
• Filed: 04/07/2016
• Issued: 01/01/2019
• Est. Priority Date: 06/05/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Son, Pilchang, Kang, Soohwan, Oh, Yonggeun
• Primary Examiner(s): Rahman, Shawnchoy
• Application Number:
  US15/092,804
• Publication Number:
  US 20160358670A1
• Time in Patent Office: 999 Days
• CPC Class Codes: G06F 21/64 Protecting data integrity, e.g. using checksums, certificates or signatures
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 16/00 Erasable programmable read-only memories G11C14/00 takes precedence
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/38 Response verification devices
• CPC Class Codes: G11C 5/04 Supports for storage elements , e.g. memory modules; Mounting or fixing of storage elements on such supports
• CPC Class Codes: H04L 9/3252 using DSA or related signature schemes, e.g. elliptic based signatures, ElGamal or Schnorr schemes

Abstract

A data storage may include at least one nonvolatile memory device and a controller operatively connected to the at least one nonvolatile memory device. The controller is configured to receive binary data from a host through a side-band interface. The controller is configured to execute the binary data according to a request from the host to execute a test operation. A test operation with respect to the data storage may be executed through a side-band interface.

Claims

1. A data storage comprising:

at least one nonvolatile memory device; and

a controller operatively connected to the at least one nonvolatile memory device,

wherein the controller is configured to receive binary data from a host through a side-band interface,

wherein the controller includes a buffer configured to store the binary data,

wherein the controller is configured to execute the binary data according to a request from the host to execute a test operation,

wherein the data storage is an on-board SSD in which the at least one nonvolatile memory device and the controller are mounted on a board,

wherein the binary data is divided according to a property of the test operation to provide divided binary data and is received from the host, and

wherein a size of the divided binary data is equal to or smaller than a size of the buffer.

2. The data storage of claim 1, wherein the side-band interface is an interface that is not a JTAG.

3. The data storage of claim 1, wherein

the controller is configured to receive address information for storing the binary data and size information corresponding to the binary data.

4. The data storage of claim 3, wherein the controller configured to store the binary data in the buffer according to the address information and the size information.

5. The data storage of claim 1, wherein

the controller is configured to receive an ECDSA (elliptic curve digital signature algorithm) signature from the host, and

the controller is configured to check validity of the binary data using the ECDSA signature.

6. The data storage of claim 1, wherein

the controller configured to receive encrypted binary data from the host, and

the controller is configured to decrypt the encrypted binary data.

7. The data storage of claim 1, wherein the board includes one of a printed circuit board, a flexible board, a tape board, and a combination thereof.

8. A method of operating a data storage that includes a controller and is configured to transmit and receive data to and from a host, the method comprising:

receiving binary data from the host through a side-band interface, wherein the side-band interface is included in the controller, and

the binary data is related to executing a test operation with respect to the data storage; and

executing, by the controller, the binary data according to a request from the host,

wherein the data storage is an on-board SSD in which at least one nonvolatile memory device and the controller are mounted on a board,

wherein the receiving the binary data includes dividing the binary data according to a property of the test operation for the data storage.

9. The method of claim 8, wherein

the receiving binary data includes receiving an ECDSA (elliptic curve digital signature algorithm) signature, and

the controller is configured to use the ECDSA signature for a validity check of the binary data.

10. The method of claim 9, further comprising:

storing the binary data in a buffer according to address information and size information of the binary data; and

checking validity of the binary data using the ECDSA signature, wherein

the storing the binary data and the checking validity of the binary data is performed after receiving the binary data.

11. The method of claim 8, further comprising:

determining whether all of the divided binary data has been executed.

12. A data storage comprising:

at least one nonvolatile memory device; and

a controller operatively connected to the at least one nonvolatile memory device,

the controller being configured to receive binary data from a host through a side-band interface,

wherein the controller is configured to perform a validity test on the binary data,

wherein the controller is configured to execute the binary data for performing at least one test operation if the validity test indicates that the binary data is valid,

wherein the data storage is an on-board SSD in which at least one nonvolatile memory device and the controller are mounted on a board,

wherein the binary data includes address information and size information,

wherein the controller is configured to determine if a size of the binary data is less than or equal to an available space of a first memory,

wherein the controller is configured to send an error code to the host if the size of the binary data is greater than the available space of the first memory,

wherein the controller is configured to store the binary data in the available space of the first memory if the size of the binary data is less than or equal to the available space of the first memory, and

wherein the controller is configured to execute the binary data for performing the at least one test operation if the size of the binary data is less than or equal to the available space of the first memory.

13. The data storage of claim 12, wherein the side-band interface is not a JTAG.

14. The data storage of claim 12, wherein

the binary data includes an ECDSA (elliptic curve digital signature algorithm), and

the controller is configured to perform the validity test on the binary data using the ECDSA signature.