System and method for low distortion capacitive signal source amplifier

• US 10,171,046 B2
• Filed: 11/06/2015
• Issued: 01/01/2019
• Est. Priority Date: 08/25/2011
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Kropfitsch, Michael, Ceballos, Jose Luis
• Primary Examiner(s): Goins, Davetta W
• Assistant Examiner(s): Ganmavo, Kuassi
• Application Number:
  US14/935,072
• Publication Number:
  US 20160065152A1
• Time in Patent Office: 1,152 Days
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/03 the amplifier being designed for audio applications
• CPC Class Codes: H03F 2200/105 A non-specified detector of the power of a signal being used in an amplifying circuit
• CPC Class Codes: H03F 2200/165 A filter circuit coupled to the input of an amplifier
• CPC Class Codes: H03F 2200/211 the input of an amplifier can be attenuated by a continuously controlled transistor attenuator
• CPC Class Codes: H03F 2200/213 A variable capacitor being added in the input circuit, e.g. base, gate, of an amplifier stage
• CPC Class Codes: H03F 3/183 with semiconductor devices only
• CPC Class Codes: H03F 3/187 in integrated circuits
• CPC Class Codes: H04R 19/005 using semiconductor materials
• CPC Class Codes: H04R 19/04 Microphones H04R19/01 takes precedence
• CPC Class Codes: H04R 3/00 Circuits for transducers , loudspeakers or microphones

Abstract

According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.

Claims

1. A method comprising:

amplifying a signal provided by a capacitive signal source to form an amplified signal;

detecting a peak voltage of the amplified signal;

comparing the detected peak voltage to a predetermined threshold; and

adjusting a controllable bias voltage of the capacitive signal source in response to detecting the peak voltage, the controllable bias voltage of the capacitive signal source being adjusted to a value inversely proportional to the detected peak voltage, wherein adjusting the controllable bias voltage comprises

decreasing the controllable bias voltage at a first rate if the detected peak voltage exceeds the predetermined threshold, and

increasing the controllable bias voltage at a second rate if detected peak voltage does not exceed the predetermined threshold, wherein the first rate is greater than the second rate.

2. The method of claim 1, wherein:

the capacitive signal source comprises a MEMS microphone; and

the controllable bias voltage is controlled such that a total harmonic distortion of the amplified signal is less than 10% for a 140dBSPL acoustic input to the MEMS microphone.

3. A system for amplifying a signal provided by a capacitive signal source, the system comprising:

a signal amplifier comprising an input node configured to be coupled to the capacitive signal source;

a controllable bias circuit configured to be coupled to a bias node of the capacitive signal source, the controllable bias circuit configured to provide a controllable bias voltage to the capacitive signal source;

a signal detection circuit coupled to an output of the signal amplifier, the signal detection circuit configured to detect peak signal values at the output of the signal amplifier; and

a control circuit coupled between the signal detection circuit and the controllable bias circuit, the control circuit configured to adjust the controllable bias circuit in response to changes in detected peak signal values, and command the controllable bias circuit to

decrease controllable bias voltage at a first rate if the signal detection circuit detects a peak signal level greater than a threshold, and

increase the controllable bias voltage at a second rate if the signal detection circuit does not detect a peak signal level greater than the threshold, wherein the first rate is greater than the second rate.

4. The system of claim 3, wherein the controllable bias circuit comprises:

a digital-to-analog converter (DAC) coupled to an output of the control circuit; and

a charge pump circuit coupled to an output of the DAC; and

a lowpass filter coupled between the charge pump circuit and an output of the controllable bias circuit.

5. The system of claim 3, further comprising the capacitive signal source.

6. The system of claim 5, wherein the capacitive signal source comprises a MEMS microphone.

7. An integrated circuit for amplifying a signal provided by a capacitive signal source, the integrated circuit comprising:

a signal amplifier comprising an input node configured to be coupled to the capacitive signal source;

a controllable bias circuit configured to be coupled to a bias node of the capacitive signal source at a first output terminal of the controllable bias circuit, the controllable bias circuit configured to provide a controllable bias voltage to the capacitive signal source via the first output terminal;

a peak detector coupled to an output of the signal amplifier;

a comparator coupled to an output of the peak detector and the output of the signal amplifier, the comparator configured to compare an output of the peak detector with a threshold; and

a control circuit coupled between the an output of the comparator and a control input of the controllable bias circuit, wherein the control circuit is configured to command the controllable bias circuit to adjust the controllable bias circuit in response to changes in detected peak signal values, command the controllable bias circuit to decrease controllable bias voltage at a first rate if the peak detector detects a peak signal level greater than the threshold and increase the controllable bias voltage at a second rate if the peak detector does not detect a peak signal level greater than the threshold, wherein the first rate is greater than the second rate.

8. The integrated circuit of claim 7, wherein the control circuit comprises:

a counter coupled to the output of the comparator, the counter being configured to increment if the output of the peak detector exceeds the threshold and decrement if the output of the peak detector does not exceed the threshold; and

a look-up table circuit coupled to the output of the counter.

9. The integrated circuit of claim 7, wherein:

the integrated circuit further comprises a single-ended to differential conversion circuit coupled between the signal amplifier and the peak detector;

the peak detector comprises a positive peak detector and a negative peak detector; and

the comparator comprises a differential comparator configured to compare an output of the positive peak detector with a positive threshold, and an output of the negative peak detector with a negative threshold.

10. The integrated circuit of claim 7, further comprising a zero crossing detector coupled to the output of the signal amplifier, wherein the control circuit is configured to adjust the controllable bias circuit when the zero crossing detector detects a zero crossing.

11. The integrated circuit of claim 7, wherein the controllable bias circuit comprises:

a digital-to-analog converter (DAC) coupled to an output of the control circuit,

a charge pump circuit coupled to an output of the DAC, and

a lowpass filter coupled between the charge pump circuit and the first output terminal of the controllable bias circuit.