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Link power savings with state retention

  • US 10,175,744 B2
  • Filed: 03/07/2017
  • Issued: 01/08/2019
  • Est. Priority Date: 06/30/2009
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a first agent, wherein the first agent is coupled to a second agent via a serial link, and the first agent comprises;

    link layer logic to;

    indicate to a physical layer of the first agent that the first agent is to enter a low power link state; and

    transmit a link entry signal to the second agent;

    the physical layer of the first agent, wherein the physical layer is to comprise an electrical sub-block and logical sub-block and is to enter the low power link state based on an acknowledgement to the link entry signal by the second agent, wherein, during the low power link state, the electrical sub-block is to be turned off and the logical sub-block is to be functionally shut down with power maintained at the logical sub-block to preserve configuration of the physical layer, and the electrical sub-block is to comprise a front end driver and clock circuitry;

    detection logic to detect terminations on the link during the low power link state based on a detect hold-off time; and

    counter logic to maintain a synchronization counter count during the low power link state.

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