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Semiconductor device and structure

  • US 10,177,147 B2
  • Filed: 04/21/2016
  • Issued: 01/08/2019
  • Est. Priority Date: 05/15/2015
  • Status: Active Grant
First Claim
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1. A semiconductor structure, comprising:

  • a semiconductor substrate, comprising;

    first, second, third, fourth PMOS transistors, wherein the first, second, third and fourth PMOS transistors are disposed in a first row; and

    first, second, third, fourth NMOS transistors, wherein the first, second, third and fourth NMOS transistors are disposed in a second row adjacent to the first row;

    a plurality of metal layers on the semiconductor substrate; and

    an oxide diffusion (OD) layer in the semiconductor substrate,wherein gates of the first PMOS and NMOS transistors are connected together for receiving an input signal through the metal layers,wherein gates of the second PMOS and NMOS transistors are connected together through the metal layers,wherein gates of the third PMOS and NMOS transistors are connected together through the metal layers, wherein gates of the fourth PMOS and NMOS transistors are connected together through the metal layers, and drains of the fourth PMOS and NMOS transistors are connected together for providing an output signal via the metal layer,wherein the first, second, third and fourth NMOS transistors are connected in parallel through the metal layers and the OD layer, the first, second, third and fourth PMOS transistors are connected in parallel through the metal layers and the OD layer, orwherein the first and second NMOS transistors are connected in serial through the metal layers and the OD layer, and the first and second PMOS transistors are connected in serial through the metal layers and the OD layer, orwherein the third and fourth NMOS transistors are connected in serial through the metal layers and the OD layer, and the third and fourth PMOS transistors are connected in serial through the metal layers and the OD layer.

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