Methods and systems for reduction of nearest-neighbor crosstalk

• US 10,177,812 B2
• Filed: 10/31/2017
• Issued: 01/08/2019
• Est. Priority Date: 01/31/2014
• Status: Active Grant

• Current Assignee: Kandou Labs, SA
• Original Assignee: Kandou Labs, SA
• Inventors: Shokrollahi, Amin
• Primary Examiner(s): Thompson, Jr., Otis L
• Application Number:
  US15/800,054
• Publication Number:
  US 20180054236A1
• Time in Patent Office: 434 Days
• Field of Search: None
• CPC Class Codes: H04B 3/32 Reducing cross-talk, e.g. by compensating

Abstract

Methods and systems are described for reduction of crosstalk in multi-wire communications systems using ensemble codes. Constraints applied to code construction and/or permissible encoding sequences eliminate transmit patterns shown to generate capacitively coupled and/or inductively coupled crosstalk.

Claims

1. A method comprising:

obtaining a set of n bits representing a first integer A and responsively partitioning the set of n bits into a first subset of bits and a second subset of bits, wherein 0≤

A<

2ⁿ;

encoding the first and second subsets of bits into bits of a first codeword of a first crosstalk-reduction (XR) code and into bits of a second codeword of a second XR code, respectively, the codewords of the first and second XR codes eliminating patterns of adjacent vector elements associated with either an inductive or capacitive constructive interference; and

transmitting the bits of the first and second codewords via adjacent groups of wires of a multi-wire bus having at least n+1 wires, the adjacent groups of wires having w1 and w2 wires, respectively.

2. The method of claim 1, wherein the first XR code comprises N1 available codewords having w1 elements, and wherein the second XR code comprises N2 available codewords having w2 elements, wherein N1<

2^w1, N2<

2^w2, and wherein N1>

N2 and w1>

w2.

3. The method of claim 2, wherein 2ⁿ<

N1*N2<

2ⁿ⁺¹.

4. The method of claim 3, wherein partitioning the n bits comprises identifying first and second states A1 and A2 based on the first integer A, wherein A=N1*A1+A2, and wherein 0≤

A2<

N1.

5. The method of claim 4, wherein the first subset of bits is a bit representation of state A1 and wherein the second subset of bits is a bit representation of state A2.

6. The method of claim 3, wherein N1=22, w1=5, N2=12, and w2=4, and wherein n=8 bits.

7. The method of claim 1, wherein the set of n bits further comprises an n+1′

th mask bit, and wherein 0≤

A≤

2ⁿ.

8. The method of claim 1, wherein encoding the first and second subsets of bits comprises stateful encoding.

9. The method of claim 1, further comprising

receiving a third and a fourth codeword of the first and second XR codes via w1 and 2 wires of the multi-wire bus, respectively;

and

determining a set of n output bits based on the received third and fourth codewords.

10. The method of claim 9, further comprising generating state representations of the third and fourth codewords, and forming a second integer based on the state representations of the third and fourth codewords, and responsively generating the set of n output bits representative of the second integer.

11. An apparatus comprising:

a plurality of signal conductors configured to obtain a set of n bits representing a first integer A and responsively partitioning the set of n bits into a first subset of bits and a second subset of bits, wherein 0≤

A<

2ⁿ;

an encoder configured to encode the first and second subsets of bits into bits of a first codeword of a first crosstalk-reduction (XR) code and into bits of a second codeword of a second XR code, respectively, the codewords of the first and second XR codes eliminating patterns of adjacent vector elements associated with either an inductive or capacitive constructive interference; and

a plurality of drivers configured to transmit the bits of the first and second codewords via adjacent groups of wires of a multi-wire bus having at least n+1 wires, the adjacent groups of wires having w1 and w2 wires, respectively.

12. The apparatus of claim 11, wherein the first XR code comprises N1 available codewords having w1 elements, and wherein the second XR code comprises N2 available codewords having w2 elements, wherein N1<

2^w1, N2<

2^w2, and wherein N1>

N2 and w1>

w2.

13. The apparatus of claim 12, wherein 2ⁿ<

N1*N2<

2ⁿ⁺¹.

14. The apparatus of claim 13, wherein the encoder is configured to partition the n bits by identifying first and second states A1 and A2 based on the first integer A, wherein A=N1*A1+A2, and wherein 0≤

A2<

N1.

15. The apparatus of claim 14, wherein the first subset of bits is a bit representation of state A1 and wherein the second subset of bits is a bit representation of state A2.

16. The apparatus of claim 13, wherein N1=22, w1=5, N2=12, and w2=4, and wherein n=8 bits.

17. The apparatus of claim 11, wherein the set of n bits further comprises an n+1′

th mask bit, and wherein 0≤

A≤

2ⁿ.

18. The apparatus of claim 11, wherein the encoder is configured to encode the first and second subsets of bits in a stateful manner.

19. The apparatus of claim 11, further comprising

a receiver configured to receive a third and a fourth codeword of the first and second XR codes via w1 and 2 wires of the multi-wire bus, respectively, and to responsively determine a set of n output bits based on the received third and fourth codewords.

20. The method of claim 19, wherein the receiver is configured to generate state representations of the third and fourth codewords, and to form a second integer based on the state representations of the third and fourth codewords, and to responsively generate the set of n output bits representative of the second integer.