MOS-varactor design to improve tuning efficiency
First Claim
1. A gate stack structure for a MOS varactor, comprising:
- a substrate including a channel region;
a high-k dielectric layer on the channel region of the substrate;
a P-type work function adjustment layer on the high-k dielectric layer, the P-type work function adjustment layer including a first portion directly contacting the high-k dielectric layer and a second portion laterally directly contacting the high-k dielectric layer and adjacent to the first portion, the first portion having a thickness greater than a thickness of the second portion;
an N-type work function adjustment layer on the P-type work function adjustment layer; and
a metal gate on the N-type work function adjustment layer.
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Abstract
A gate stack structure for a MOS varactor includes a substrate including a channel region, a high-k dielectric layer on the channel region of the substrate, a P-type work function adjustment layer on the high-k dielectric layer, an N-type work function adjustment layer on the P-type work function adjustment layer, and a metal gate on the N-type work function adjustment layer. The P-type work function adjustment layer includes a first portion and a second portion laterally adjacent to each other, the first portion having a thickness greater than a thickness of the second portion. The gate stack structure in the MOS varactor can increase the tuning range of the MOS varactor.
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Citations
13 Claims
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1. A gate stack structure for a MOS varactor, comprising:
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a substrate including a channel region; a high-k dielectric layer on the channel region of the substrate; a P-type work function adjustment layer on the high-k dielectric layer, the P-type work function adjustment layer including a first portion directly contacting the high-k dielectric layer and a second portion laterally directly contacting the high-k dielectric layer and adjacent to the first portion, the first portion having a thickness greater than a thickness of the second portion; an N-type work function adjustment layer on the P-type work function adjustment layer; and a metal gate on the N-type work function adjustment layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A gate stack structure for a MOS varactor, comprising:
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a substrate including a channel region; a high-k dielectric layer on the channel region of the substrate; a P-type work function adjustment layer on the high-k dielectric layer; an N-type work function adjustment layer on the P-type work function adjustment layer; and a metal gate on the N-type work function adjustment layer, wherein the P-type work function adjustment layer comprises; a first portion directly contacting the high-k dielectric layer and a second portion directly contacting the high-k dielectric layer and laterally adjacent to the first portion, the first portion being configured to adjust the work function of a PMOS device, and the second portion being configured to adjust the work function of an NMOS device. - View Dependent Claims (10, 11, 12, 13)
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Specification