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State estimation processor and state estimation system

  • US 10,191,739 B2
  • Filed: 09/22/2016
  • Issued: 01/29/2019
  • Est. Priority Date: 03/31/2014
  • Status: Active Grant
First Claim
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1. A state estimation processor connected to an external detection device and an external computer, comprising:

  • interface circuitry configured to obtain detection information obtained by the external detection device and output state information to the external computer;

    calculating circuitry including a SIMD type arithmetic processing circuitry processes a plurality of information by one command and provided with at least four single precision floating point computing circuits, the one command being executed in parallel to a plurality of data set to each of the at least four single precision floating point computing circuits in a single cycle;

    the calculating circuitry configured to;

    estimate a state of an object based on the detection information obtained by the interface circuitry;

    generate the state information according to the state of the object;

    compare first detection information received at a first point in time with second detection information received at a second point in time, which is subsequent to the first point in time;

    control the interface circuitry to output a notification to the external computer when it is determined that a difference between the first detection information and the second detection information is less than a predetermined threshold value; and

    switch an operational mode from a first operation mode, during which the state information is generated, to a second operation mode in which power consumption is smaller than the first operation mode after controlling the interface circuitry to output the notification to the external computer.

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