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Microprocessor device with reset timer

  • US 10,191,793 B2
  • Filed: 06/14/2013
  • Issued: 01/29/2019
  • Est. Priority Date: 06/26/2012
  • Status: Active Grant
First Claim
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1. A microprocessor device comprising a timer capable of resetting the device and a plurality of hardware registers arranged so that a collective predetermined state of the registers fixed by a hard-wired logical relationship between the registers resets the timer, the device further comprising software having a plurality of functions arranged to place said registers in said predetermined state if each of said functions has executed properly.

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