Controlling power management in micro-server cores and peripherals
First Claim
1. A computer-implemented method comprising:
- using side band communication, causing one or more peripherals of a server having multiple cores to delay operations based on determining that the cores are being placed into a first power consumption state;
placing the cores into a second power consumption state during a time period, the second power consumption state consuming less power than the first power consumption state;
using the side band communication, causing the one or more peripherals to resume operations based on an expiration of the time period; and
placing the cores into a third power consumption state based on the expiration of the time period and based on receiving an indication that the one or more peripherals are unable to continue to delay their operations before the expiration of the time period, the third power consumption state consuming more power than the first power consumption state and the second power consumption state;
wherein the time period starts in response to the cores being placed into the first power consumption state;
wherein the time period is set based on a maximum direct memory access alignment period;
wherein the second power consumption state is a sleep-type power consumption state.
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Abstract
Systems and methods of enabling power management in a micro server include providing multiple cores, a power management module coupled to the cores, and one or more peripherals coupled to the power management module. The power management module may be configured to cause the one or more peripherals to delay operations based on determining that the cores are in a first power consumption state, and place the cores in a second power consumption state for a predetermined time period. The second power consumption state may consume less power than the first power consumption state. The power management module may cause the one or more peripherals to resume their operations based on expiration of the predetermined time period and may place the cores in a third power consumption state based on the expiration of the time period.
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Citations
18 Claims
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1. A computer-implemented method comprising:
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using side band communication, causing one or more peripherals of a server having multiple cores to delay operations based on determining that the cores are being placed into a first power consumption state; placing the cores into a second power consumption state during a time period, the second power consumption state consuming less power than the first power consumption state; using the side band communication, causing the one or more peripherals to resume operations based on an expiration of the time period; and placing the cores into a third power consumption state based on the expiration of the time period and based on receiving an indication that the one or more peripherals are unable to continue to delay their operations before the expiration of the time period, the third power consumption state consuming more power than the first power consumption state and the second power consumption state; wherein the time period starts in response to the cores being placed into the first power consumption state; wherein the time period is set based on a maximum direct memory access alignment period; wherein the second power consumption state is a sleep-type power consumption state. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A system comprising:
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multiple cores; a power management unit coupled to the cores; and one or more peripherals coupled to the power management unit, wherein the power management unit is to; cause the one or more peripherals to delay operations based on determining that the cores are in a first power consumption state; place the cores in a second power consumption state during a time period, the second power consumption state consuming less power than the first power consumption state; cause the one or more peripherals to resume their operations based on expiration of the time period; and place the cores in a third power consumption state based on the expiration of the time period and based on receiving an indication that the one or more peripherals are unable to continue to delay their operations before the expiration of the time period, the third power consumption state consuming more power than the first power consumption state and the second power consumption state; wherein the time period starts in response to the cores being placed into the first power consumption state; wherein the time period is set based on a maximum direct memory access alignment period; wherein the second power consumption state is a sleep-type power consumption state. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A non-transitory computer readable storage medium comprising a set of instruction which, when executed by a processor, cause a computer to:
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using side band communication, cause one or more peripherals of a server having multiple cores to delay operations based on determining that the cores are being placed into a first power consumption state; place the cores into a second power consumption state during a time period, the second power consumption state consuming less power than the first power consumption state; using the side band communication, cause the one or more peripherals to resume operations based on an expiration of the time period; and place the cores into a third power consumption state based on the expiration of the time period and based on receiving an indication that the one or more peripherals are unable to continue to delay their operations before the expiration of the time period, the third power consumption state consuming more power than the first power consumption state and the second power consumption state; wherein the time period starts in response to the cores being placed into the first power consumption state; wherein the time period is set based on a maximum direct memory access alignment period; wherein the second power consumption state is a sleep-type power consumption state. - View Dependent Claims (17, 18)
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Specification