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Handling memory requests

  • US 10,198,286 B2
  • Filed: 03/28/2017
  • Issued: 02/05/2019
  • Est. Priority Date: 03/29/2016
  • Status: Active Grant
First Claim
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1. A module comprising:

  • an assignment module arranged to receive memory requests from a cache and to assign a transaction identifier to each received memory request, wherein the memory requests received from the cache include one or more memory addresses defined in a virtual address space;

    a transaction tracker module arranged to receive a memory request from the assignment module with the assigned transaction identifier, to track the status of the memory request and to receive translation information from a memory management unit, wherein the translation information comprises a translation of a virtual memory address in the memory request to a physical memory address or a pointer to the translation; and

    an arbiter module arranged to receive a memory request from the transaction tracker module with the assigned transaction identifier when the memory request is ready for issue and to issue the memory request to a memory via an external bus and to trigger the freeing of the assigned transaction identifier in response to receiving a response from the memory via the external bus, wherein the memory request issued to memory includes one or more physical memory addresses determined using the translation information.

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