Non-volatile memory devices, operating methods thereof and memory systems including the same
First Claim
1. A method of operating a nonvolatile memory device including a plurality of memory cell strings, each of the plurality of memory cell strings including a plurality of memory cells stacked on a substrate in a direction vertical to the substrate, the plurality of memory cells being divided into a first portion and a second portion, the second portion being stacked over the first portion, the method comprising:
- programming a first selected memory cell located in the first portion by applying a first initial program voltage on the first selected memory cell, a level of the first initial program voltage being higher as a distance between the first selected memory cell and the substrate being longer;
verifying the first selected memory cell to determine programming pass or programming fail;
programming a second selected memory cell located in the second portion by applying a second initial program voltage on the second selected memory cell, a level of the second initial program voltage being higher as a distance between the second selected memory cell and the substrate being longer; and
verifying the second selected memory cell to determine programming pass or programming fail,wherein, the level of the first initial program voltage applied to the first selected memory cell located at top of the first portion is higher than the level of the second initial program voltage applied to the second selected memory cell located at bottom of the second portion.
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Abstract
Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
193 Citations
18 Claims
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1. A method of operating a nonvolatile memory device including a plurality of memory cell strings, each of the plurality of memory cell strings including a plurality of memory cells stacked on a substrate in a direction vertical to the substrate, the plurality of memory cells being divided into a first portion and a second portion, the second portion being stacked over the first portion, the method comprising:
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programming a first selected memory cell located in the first portion by applying a first initial program voltage on the first selected memory cell, a level of the first initial program voltage being higher as a distance between the first selected memory cell and the substrate being longer; verifying the first selected memory cell to determine programming pass or programming fail; programming a second selected memory cell located in the second portion by applying a second initial program voltage on the second selected memory cell, a level of the second initial program voltage being higher as a distance between the second selected memory cell and the substrate being longer; and verifying the second selected memory cell to determine programming pass or programming fail, wherein, the level of the first initial program voltage applied to the first selected memory cell located at top of the first portion is higher than the level of the second initial program voltage applied to the second selected memory cell located at bottom of the second portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of programming a nonvolatile memory device including a plurality of memory cell strings, each of the plurality of memory cell strings including a plurality of memory cells stacked on a substrate in a direction vertical to the substrate, the plurality of memory cells being divided into a first portion and a second portion, the second portion being stacked over the first portion, the method comprising:
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programming the first selected memory cell located in the first portion by applying a first initial program voltage on the first selected memory cell, a level of the first initial program voltage being higher as a distance between the first selected memory cell and the substrate being longer; programming the second selected memory cell located in the second portion by applying a second initial program voltage on the second selected memory cell, a level of the second initial program voltage being higher as a distance between the second selected memory cell and the substrate being longer; and programming the first selected memory cell located in the first portion by applying a first increased program voltage on the first selected memory cell, a level of the first increased program voltage being higher than the first initial program voltage by a first increment, a magnitude of the first increment being greater as the distance between the first selected memory cell and the substrate being longer; and programming the second selected memory cell located in the second portion by applying a second increased program voltage on the second selected memory cell, a level of the second increase program voltage being higher than the second initial program voltage by a second increment, a magnitude of the second increment being greater as the distance between the second selected memory cell and the substrate being longer, wherein the level of the first initial program voltage applied on the first selected memory cell located at a top of the first portion is higher than the level of the second initial program voltage applied on the second selected memory cell located at a bottom of the second portion, wherein the first increment of the first increased program voltage applied on the first selected memory cell located at the top of the first portion is greater than the second increment of the second increased program voltage applied on the second selected memory cell located at the bottom of the second portion. - View Dependent Claims (18)
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Specification