Electronic device and method of fabricating the same

• US 10,199,562 B2
• Filed: 07/11/2017
• Issued: 02/05/2019
• Est. Priority Date: 07/28/2016
• Status: Active Grant

• Current Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Original Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Inventors: Yamamoto, Shinji, Konno, Jumpei, Miyagawa, Takashi
• Primary Examiner(s): Gumedzoe, Peniel M
• Application Number:
  US15/646,399
• Publication Number:
  US 20180033952A1
• Time in Patent Office: 574 Days
• CPC Class Codes: H01L 2224/81192 wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H03H 3/02 for the manufacture of piezoelectric or electrostrictive resonators or networks H03H3/08 takes precedence
• CPC Class Codes: H03H 3/08 for the manufacture of resonators or networks using surface acoustic waves
• CPC Class Codes: H03H 9/0523 for flip-chip mounting
• CPC Class Codes: H03H 9/059 consisting of mounting pads or bumps
• CPC Class Codes: H03H 9/14541 Multilayer finger or busbar electrode
• CPC Class Codes: H03H 9/25 Constructional features of resonators using surface acoustic waves devices for manipulating acoustic surface waves in general G10K11/36
• CPC Class Codes: H10N 30/02 Forming enclosures or casings
• CPC Class Codes: H10N 30/06 Forming electrodes or interconnections, e.g. leads or terminals
• CPC Class Codes: H10N 30/072 by laminating or bonding of piezoelectric or electrostrictive bodies
• CPC Class Codes: H10N 30/8542 Alkali metal based oxides, e.g. lithium, sodium or potassium niobates
• CPC Class Codes: H10N 30/875 Further connection or lead arrangements, e.g. flexible wiring boards, terminal pins
• CPC Class Codes: H10N 30/883 Further insulation means against electrical, physical or chemical damage, e.g. protective coatings

Abstract

A method of fabricating an electronic device, the method including: arranging a device chip with no bump located on a lower surface of the device chip on a mounting substrate including a bump located on an upper surface of the mounting substrate; and bonding a pad located on the lower surface of the device chip and the bump by applying an ultrasonic wave to the device chip from an upper surface of the device chip.

Claims

1. A method of fabricating an electronic device, the method comprising:

arranging a plurality of device chips on an upper surface of a single mounting substrate, each of the plurality of device chips having a first pad on a lower surface and having no bump on the lower surface, the mounting substrate having bumps on the upper surface of the mounting substrate;

bonding the first pads on the lower surface of the respective device chips and the bumps on the upper surface of the mounting substrate by applying an ultrasonic wave to the device chips from respective upper surfaces of the device chips; and

after bonding the first pads and the bumps, separating the mounting substrate having the plurality of device chips mounted thereon into a plurality of substrates each having the corresponding device chip thereon,

wherein;

each of the device chips includes, on the lower surface of the device chip, a functional element and a frame body, the frame body surrounding the functional element and having a larger thickness than the functional element, and

the frame body is configured so as to be not in contact with any of the upper surface of the mounting substrate, the bumps and the second pads on the upper surface of the mounting substrate, after bonding the first pads and the bumps.

2. The method according to claim 1, wherein

the first pads and the bumps are made of a same material.

3. The method according to claim 2, wherein each of the bumps is a gold bump.

4. The method according to claim 1, wherein:

each of the bumps is disposed on a second pad formed on the upper surface of the mounting substrate, and

an area of a bond between each of the bumps and the corresponding second pad on the upper surface of the mounting substrate is greater than an area of a bond between the bump and the corresponding first pad.

5. The method according to claim 1, wherein the frame body is a burr formed when the device chip is cut by a dicing blade.

6. The method according to claim 1, further comprising:

causing a tool to hold the device chip by causing the tool to be in contact with a lower surface of the frame body without being in contact with a lower surface of the functional element.

7. The method according to claim 1, wherein the functional element is an acoustic wave element.

8. A method of fabricating an electronic device, the method comprising:

forming a functional element on an upper surface of a substrate;

forming a metal layer on the upper surface of the substrate so that the metal layer surrounds the functional element;

cutting the substrate into a plurality of device chips by dicing the metal layer and the substrate with use of a dicing blade and thereby forming a burr on an upper surface of the metal layer; and

causing a tool to hold at least one of the plurality of device chips by causing the tool to be in contact with an upper surface of the burr without being in contact with an upper surface of the functional element.

9. The method according to claim 8, wherein the functional element is an acoustic wave element.