Variation-aware design analysis
First Claim
1. A system that evaluates designs for a microprocessor circuit, comprising a non-transitory computer-readable medium storing instructions that, when executed by a computer processor, cause the computer processor to perform the steps of:
- receiving a proposed design for the microprocessor circuit;
selecting a first analysis of interest from a set of analyses of interest that evaluates values of a first microprocessor measurement of interest;
selecting a first set of circuit parameters from a set of representative circuit parameters having analysis-specific stimuli as a function of the first analysis of interest and the proposed design;
applying the first set of circuit parameters to the proposed design to construct a first analysis-specific simulation model;
deriving a first set of analysis-specific custom corners for the proposed design as a function of the first analysis-specific simulation model;
simulating the first analysis-specific simulation model as a function of the first set of analysis-specific custom corners to derive a first set of worst-case values for the first microprocessor measurement of interest;
evaluating the first set of worst-case values against a set of allowed limits for the first microprocessor measurement of interest;
transmitting a notification of a violation when at least one of the first set of worst-case values violates at least one of the set of allowed limits;
simulating the first analysis-specific simulation model while varying global process parameters and local process parameters to produce a golden set of empirical models;
evaluating the golden set of empirical models against the set of allowed limits for the first microprocessor measurement of interest;
transmitting a notification to waive the violation when none of the golden set of empirical models violates any of the set of allowed limits for the first microprocessor measurement of interest,modifying the proposed design using the first analysis-specific simulation model and the derived first set of worst-case values for the first microprocessor measurement of interest; and
fabricating the modified proposed design.
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Accused Products
Abstract
A microprocessor evaluation system evaluates a microprocessor circuit by using analysis-specific custom corners that are derived specifically for the analysis of interest. Circuit parameters specific to the analysis of interest are applied to a proposed design to derive the custom corners, which will trigger violations more accurately than corners selected using traditional methods. The custom corners could also be reused in between design phases to reduce redesign simulation time. Local process parameters could be taken into account using worst-case local parameter offsets to detect violations in a far more accurate manner than using generic guard-band budgets.
31 Citations
18 Claims
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1. A system that evaluates designs for a microprocessor circuit, comprising a non-transitory computer-readable medium storing instructions that, when executed by a computer processor, cause the computer processor to perform the steps of:
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receiving a proposed design for the microprocessor circuit; selecting a first analysis of interest from a set of analyses of interest that evaluates values of a first microprocessor measurement of interest; selecting a first set of circuit parameters from a set of representative circuit parameters having analysis-specific stimuli as a function of the first analysis of interest and the proposed design; applying the first set of circuit parameters to the proposed design to construct a first analysis-specific simulation model; deriving a first set of analysis-specific custom corners for the proposed design as a function of the first analysis-specific simulation model; simulating the first analysis-specific simulation model as a function of the first set of analysis-specific custom corners to derive a first set of worst-case values for the first microprocessor measurement of interest; evaluating the first set of worst-case values against a set of allowed limits for the first microprocessor measurement of interest; transmitting a notification of a violation when at least one of the first set of worst-case values violates at least one of the set of allowed limits; simulating the first analysis-specific simulation model while varying global process parameters and local process parameters to produce a golden set of empirical models; evaluating the golden set of empirical models against the set of allowed limits for the first microprocessor measurement of interest; transmitting a notification to waive the violation when none of the golden set of empirical models violates any of the set of allowed limits for the first microprocessor measurement of interest, modifying the proposed design using the first analysis-specific simulation model and the derived first set of worst-case values for the first microprocessor measurement of interest; and fabricating the modified proposed design. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer-implemented method of evaluating designs for a microprocessor circuit, the method comprising:
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receiving, by a computer processor, a proposed design for the microprocessor circuit; receiving, by a computer processor, a first analysis of interest that evaluates values of a first microprocessor measurement of interest; identifying, by a computer processor, a first set of circuit parameters having analysis-specific stimuli as a function of the first analysis of interest and the proposed design; producing, by a computer processor, first analysis-specific simulation model as a function of the first set of circuit parameters; deriving, by a computer processor, a first set of analysis-specific custom corners for the proposed design as a function of the first analysis-specific simulation model; simulating, by a computer processor, the first analysis-specific simulation model as a function of the first set of analysis-specific custom corners to derive a first set of worst-case values for the first microprocessor measurement of interest evaluating, by a computer processor, the first set of worst-case values against a set of allowed limits for the first microprocessor measurement of interest; transmitting, by a computer processor, a notification of a violation when at least one of the first set of worst-case values violates at least one of the set of allowed limits; simulating, by a computer processor, the first analysis-specific simulation model while varying global process parameters and local process parameters to produce a golden set of empirical models; evaluating, by a computer processor, the golden set of empirical models against the set of allowed limits for the first microprocessor measurement of interest; transmitting, by a computer processor, a notification to waive the violation when none of the golden set of empirical models violates any of the set of allowed limits for the first microprocessor measurement of interest; modifying the proposed design using the first analysis-specific simulation model and the derived first set of worst-case values for the first microprocessor measurement of interest; and fabricating the modified proposed design. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A computer system that evaluates designs for a microprocessor circuit, the computer system comprising:
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a user interface programmed to; receive a proposed design for the microprocessor circuit; and receive a selection of a first analysis of interest from a set of analyses of interest that evaluates values of a first microprocessor measurement of interest; and a computer processor programmed to; select a first set of circuit parameters from a set of representative circuit parameters having analysis-specific stimuli as a function of the first analysis of interest and the proposed design; apply the first set of circuit parameters to the proposed design to construct a first analysis-specific simulation model; derive a first set of analysis-specific custom corners for the proposed design as a function of the first analysis-specific simulation model; simulate the first analysis-specific simulation model as a function of the first set of analysis-specific custom corners to derive a first set of worst-case values for the first microprocessor measurement of interest; evaluate the first set of worst-case values against a set of allowed limits for the first microprocessor measurement of interest; transmit a notification of a violation when at least one of the first set of worst-case values violates at least one of the set of allowed limits; simulate the first analysis-specific simulation model while varying global process parameters and local process parameters to produce a golden set of empirical models; evaluate the golden set of empirical models against the set of allowed limits for the first microprocessor measurement of interest; transmit a notification to waive the violation when none of the golden set of empirical models violates any of the set of allowed limits for the first microprocessor measurement of interest; and enable modification of the proposed design using the first analysis-specific simulation model and the derived first set of worst-case values for the first microprocessor measurement of interest; and fabricate the modified proposed design. - View Dependent Claims (17, 18)
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Specification