Thin film transistor, array substrate, methods for fabricating the same, and display device
First Claim
Patent Images
1. A thin film transistor comprising:
- a substrate;
an active layer positioned on the substrate;
a gate positioned on the active layer, the gate including one or more edge portions;
a first insulation layer positioned on the gate; and
a light blocking portion positioned on the first insulation layer, the light blocking portion being arranged only above the one or more edge portions of the gate to block light from entering the active layer from the one or more edge portions of the gate.
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Abstract
The embodiments of the present disclosure relate to an array substrate, a thin film transistor, methods for fabricating the same, and a display device. The method for fabricating the array substrate provided by the embodiments of the present disclosure comprises: forming an active layer on a substrate; forming a gate on the active layer; forming a first insulation layer on the gate; forming a light blocking portion on the first insulation layer, the light blocking portion being arranged above an edge portion of the gate, so that the light blocking portion blocks light entering the active layer from the edge portion of the gate.
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Citations
17 Claims
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1. A thin film transistor comprising:
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a substrate; an active layer positioned on the substrate; a gate positioned on the active layer, the gate including one or more edge portions; a first insulation layer positioned on the gate; and a light blocking portion positioned on the first insulation layer, the light blocking portion being arranged only above the one or more edge portions of the gate to block light from entering the active layer from the one or more edge portions of the gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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- 10. An array substrate comprising one or more conductive layers and a thin film transistor, the thin film transistor including a substrate, an active layer positioned on the substrate, a gate positioned on the active layer, a first insulation layer positioned on the gate, a light blocking portion positioned on the first insulation layer, a second insulation layer, a first conductive layer positioned on the second insulation layer and having a first portion and a third portion, and a second conductive layer having a second portion and a fourth portion, the light blocking portion being arranged above an edge portion of the gate to block light from entering the active layer from the edge portion of the gate, wherein the first portion forms the gate, wherein the second portion forms the light blocking portion, wherein the third portion is spaced apart from the first portion, wherein the fourth portion is spaced apart from the second portion, and wherein the third portion and the fourth portion are at least partially overlapped with each other in a vertical direction to form a capacitor.
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12. A method for fabricating an array substrate, the method comprising:
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forming an active layer on a substrate; forming a gate on the active layer; forming a first insulation layer on the gate; and forming a light blocking portion on the first insulation layer so that the light blocking portion is arranged only above one or more edge portions of the gate to block light from entering the active layer from the one or more edge portions of the gate. - View Dependent Claims (13, 14, 15, 16, 17)
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Specification