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Bottom source NMOS triggered Zener clamp for configuring an ultra-low voltage transient voltage suppressor (TVS)

  • US 10,205,017 B2
  • Filed: 09/25/2013
  • Issued: 02/12/2019
  • Est. Priority Date: 06/17/2009
  • Status: Active Grant
First Claim
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1. A method of forming a transient voltage suppressing (TVS) device comprising:

  • forming an epitaxial layer of a first conductivity type on top of a semiconductor substrate wherein the semiconductor substrate comprises a heavily doped bottom layer of the first conductivity type;

    forming a trench gate padded with a gate insulation layer and filled with a gate material in the trench gate in the epitaxial layer;

    forming a body region with a second conductivity type in the epitaxial layer next to the trench gate and forming a drain contact region and an epitaxial contact region of the first conductivity type with the drain contact region encompassed in the body region and the epitaxial contact region disposed in the epitaxial layer, forming a body contact region of the second conductivity type near a top surface of the body region disposed at a distance from the drain contact region; and

    forming a bottom source/emitter/anode electrode layer beneath the semiconductor substrate and forming on a top surface of the epitaxial layer a drain/collector/cathode electrode to contact the trench gate and the drain contact region and further forming a body to source short to electrically short the body contact region to the epitaxial contact region thus forming a TVS structure comprises a TVS diode, a vertical bipolar transistor and a bottom-source metal-oxide-semiconductor field effect transistor (BS-MOSFET) as three parallel connected vertical circuits between the drain/collector/cathode electrode disposed on top of the epitaxial layer and the bottom source/emitter/anode electrode layer.

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