Systems and methods for forming thermoelectric devices

• US 10,205,080 B2
• Filed: 01/17/2013
• Issued: 02/12/2019
• Est. Priority Date: 01/17/2012
• Status: Active Grant

• Current Assignee: Matrix Industries, Inc.
• Original Assignee: Matrix Industries, Inc.
• Inventors: Boukai, Akram I., Tham, Douglas W.
• Primary Examiner(s): Swanson, Walter H
• Assistant Examiner(s): Ly, Kien
• Application Number:
  US14/372,443
• Publication Number:
  US 20140373888A1
• Time in Patent Office: 2,217 Days
• Field of Search: None
• CPC Class Codes: H10N 10/01 Manufacture or treatment
• CPC Class Codes: H10N 10/17 characterised by the structure or configuration of the cell or thermocouple forming the device

Abstract

A method for forming a thermoelectric element for use in a thermoelectric device comprises providing a mask adjacent to a substrate, the mask comprising a polymeric mixture, and bringing a template having a first pattern in contact with the mask to define a second pattern in the mask. The first pattern comprises one of holes and rods, and the second pattern comprises the other of holes and rods. Holes or rods of the second pattern expose portions of the substrate. Next, an etching layer is deposited adjacent to exposed portions of the substrate. The etching layer is configured to aid in etching the substrate. The substrate is subsequently etched with the aid of the etching layer.

Claims

1. A method for forming a thermoelectric element, comprising:

(a) providing a mask adjacent to a substrate, said mask comprising a polymeric mixture;

(b) bringing a template having a first pattern comprising rods in contact with said mask to define a second pattern in said mask, wherein said second pattern exposes portions of said substrate through said mask;

(c) depositing an etch block layer on said portions of said substrate exposed through said mask, wherein said etch block layer comprises a first metallic material, and removing said mask;

(d) subsequent to removing said mask, depositing an etching layer adjacent to said substrate, wherein said etching layer comprises metallic particles comprising a second metallic material configured to catalytically etch said substrate, wherein said first metallic material is configured to limit or prevent etching of said substrate that is facilitated by said second metallic material; and

(e) using said metallic particles to catalytically etch said substrate to form holes in said substrate, thereby forming said thermoelectric element.

2. The method of claim 1, wherein, in (d), said etching layer is deposited on said etch block layer and adjacent to said substrate, wherein said etch block layer comprises a material that reduces an etch rate of portions of said substrate that are adjacent to said etch block layer.

3. The method of claim 1, wherein, subsequent to (c), said mask is removed, and wherein removal of said mask exposes portions of said substrate.

4. The method of claim 1, wherein an individual hole has a surface with a metal content of at least about 0.000001%.

5. The method of claim 1, wherein said holes have an aspect ratio of at least about 100:

1.

6. The method of claim 1, wherein said holes have an aspect ratio of at least about 1000:

1.

7. The method of claim 1, wherein in (e) said metallic particles are exposed to an oxidizing agent and a chemical etchant.

8. The method of claim 7, wherein said metallic particles are exposed to said oxidizing agent and said chemical etchant simultaneously.

9. The method of claim 7, wherein said metallic particles are exposed to said oxidizing agent and said chemical etchant sequentially.

10. The method of claim 7, wherein exposure of said metallic particles to said oxidizing agent and said chemical etchant is timed such that said etching is not through substantially all of said substrate.

11. The method of claim 1, wherein in (e) said substrate is exposed to an oxidizing agent and a chemical etchant.

12. The method of claim 11, wherein said substrate is exposed to said oxidizing agent and said chemical etchant simultaneously.

13. The method of claim 1, wherein said first metallic material comprises one or more metals selected from the group consisting of chromium, molybdenum, tungsten, titanium and niobium.

14. The method of claim 1, wherein said substrate is a semiconductor substrate.

15. The method of claim 1, wherein said holes have an aspect ratio of at least about 5000:

1.

16. The method of claim 1, wherein said holes have an aspect ratio of at least about 10,000:

1.

17. The method of claim 1, wherein said metallic particles are deposited on said substrate by physical vapor deposition.

18. The method of claim 1, wherein said metallic particles are nanoparticles.

19. The method of claim 1, wherein a root mean square roughness of a given one of said holes is between about 0.1 nm and 50 nm determined by transmission electron microscopy (TEM).

20. The method of claim 19, wherein said root mean square roughness of one of said holes is between about 1 nm and 20 nm determined by TEM.