×

Clock synchronization using multiple network paths

  • US 10,205,547 B2
  • Filed: 10/30/2017
  • Issued: 02/12/2019
  • Est. Priority Date: 02/09/2012
  • Status: Active Grant
First Claim
Patent Images

1. A network device, comprising:

  • one or more ports coupled to a network, the one or more ports configured to receive a plurality of time synchronization packets from a master clock device, the plurality of time synchronization packets for synchronization of a system time clock in the network device with the master clock device;

    a path determination module implemented on one or more integrated circuit devices configured to identify, based on respective path information included in each of at least some of the plurality of time synchronization packets, particular communication paths among two or more communication paths between the master clock device and the network device, via which the respective time synchronization packets traveled from the master clock device to the network device;

    a time synchronization module implemented on the one or more integrated circuit devices configured to determine, based on (i) respective time information included in the at least some of the plurality of time synchronization packets and (ii) the identifications of the particular communication paths via which the respective time synchronization packets traveled from the master clock device to the network device, respective clock values for the two or more communication paths, anda clock module implemented on the one or more integrated circuit devices, the clock module configured toreceive the respective clock values determined for the two or more communication paths, anddetermine a value of the system time clock based on at least a subset of the received respective clock values determined for the two or more communication paths.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×