Semiconductor device and manufacturing method thereof

• US 10,211,060 B2
• Filed: 11/22/2016
• Issued: 02/19/2019
• Est. Priority Date: 02/27/2014
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Thomason, Michael, Quddus, Mohammed Tanvir, Morgan, James, Mudholkar, Mihir, Donaldson, Scott, Grivna, Gordon M.
• Primary Examiner(s): Hossain, Moazzam
• Application Number:
  US15/358,361
• Publication Number:
  US 20170076949A1
• Time in Patent Office: 819 Days
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 21/28537 Deposition of Schottky electrodes
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/28568 the conductive layers comprising transition metals H01L21/28518 takes precedence
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/76883 Post-treatment or after-treatment of the conductive material
• CPC Class Codes: H01L 21/76889 by forming silicides of refractory metals
• CPC Class Codes: H01L 29/401 Multistep manufacturing processes
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/475 on AIII-BV compounds
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A number of variations may include a method that may include depositing a first layer on a first semiconductor layer in an overlying position with respect to at least one trench structure formed in the first semiconductor epi layer. The first layer may include a first metal and a second metal. A second layer may comprise a material constructed and arranged to scavenge semiconductor material migrating from the first semiconductor layer during annealing may be deposited over the first layer. The first semiconductor layer may be subjected to at least a first annealing act to provide a first structure. At least a portion of the first structure may be stripped to remove any of the first layer not reacted with the semiconductor material to form a Schottky barrier structure during the first annealing act.

Claims

1. A method for manufacturing a semiconductor device comprising:

providing a first semiconductor layer having a first major surface and at least one trench structure disposed within in the first semiconductor layer extending from the first major surface, wherein the trench structure comprises an isolating layer along a first wall, a bottom surface, and an opposite second wall, and a conductive material disposed between the first wall and the second wall;

forming a first layer adjacent to the first major surface, wherein the first layer comprises a first metal and a second metal, and wherein the first layer is adjacent to the conductive material and the isolating layer;

forming a second layer comprising a material constructed and arranged to scavenge semiconductor material migrating from the first semiconductor layer during annealing;

subjecting the first semiconductor layer to at least a first annealing act whereby the first layer reacts with the first semiconductor layer to form a Schottky barrier structure and reacts with the conductive layer to form a contact structure, and wherein a portion of the first layer remains unreacted after the first annealing act; and

removing the portion of the first layer that remains unreacted, wherein an opening is thereby formed to expose the isolating layer at the first wall of the trench structure and between the Schottky barrier structure formed adjacent to the first semiconductor layer and the contact structure formed adjacent to the conductive layer.

2. The method of claim 1, wherein:

providing the first semiconductor layer comprises providing the first the semiconductor layer comprising silicon; and

the first annealing act provides the Schottky barrier structure comprising a silicide.

3. The method of claim 2, wherein forming the first layer comprises:

forming the first metal comprising nickel; and

forming the second metal comprising platinum.

4. The method of claim 3, wherein forming the first layer comprises:

providing the nickel in a range from about 60 weight percent to about 95 weight percent of the first layer; and

providing the platinum in a range from about 5 weight percent to about 40 weight percent of the first layer.

5. The method of claim 3, wherein forming the first layer comprises:

providing the nickel in a range from about 60 weight percent to about 85 weight percent of the first layer; and

providing the platinum in a range from about 15 weight percent to about 40 weight percent of the first layer.

6. The method of claim 3, wherein forming the first layer comprises:

providing the nickel in a range from about 85 weight percent to about 95 weight percent of the first layer; and

providing the platinum in a range from about 5 weight percent to about 15 weight percent of the first layer.

7. The method of claim 1, wherein the first annealing act is a rapid temperature annealing act exposing the first semiconductor layer to a temperature in a range from about 300 degrees Celsius through about 700 degrees Celsius.

8. The method of claim 1, wherein forming the second layer comprises forming the second layer comprising titanium.

9. The method of claim 8, wherein the first annealing act is a rapid temperature annealing act carried out in a nitrogen atmosphere.

10. The method of claim 1, wherein the first annealing act is carried out in a furnace and exposes the first semiconductor layer to a temperature ranging from about 300 degrees Celsius through about 450 degrees Celsius.

11. The method of claim 10, wherein the first annealing act is carried out in a nitrogen atmosphere.

12. A method for forming a Schottky rectifier semiconductor device comprising:

providing a first semiconductor layer having a first major surface and at least one trench structure disposed within the first semiconductor layer extending from the first major surface, wherein the trench structure comprises a trench having a first wall, a bottom surface, and an opposite second wall, an isolating layer disposed along the first wall, the bottom surface, and the opposite second wall, and a conductive layer disposed between the first wall and the second wall;

forming a first layer on the first major surface of the first semiconductor layer in an overlying position with respect to the at least one trench structure, wherein the first layer comprises two or more of nickel, chrome, titanium, and platinum, and wherein the first layer is in an overlying position with respect to the conductive layer and the isolating layer;

forming a second layer comprising a material constructed and arranged to scavenge semiconductor material migrating from the first semiconductor layer during annealing;

subjecting the first semiconductor layer to at least a first annealing act to provide a first structure having a Schottky barrier structure overlying the first semiconductor layer and a contact structure overlying the conductive layer; and

removing at least a portion of the first structure to form an opening between the Schottky barrier structure overlying the first semiconductor layer and the contact structure overlying the conductive layer.

13. The method of claim 12, wherein:

providing the first semiconductor layer comprises providing the first semiconductor layer comprising silicon;

forming the first layer comprises depositing the first layer comprising at least nickel and platinum; and

forming the second layer comprises depositing the second layer comprising titanium.

14. The method of claim 13, wherein forming the first layer comprises:

providing the nickel in a range from about 60 weight percent to about 95 weight percent of the first layer; and

providing the platinum in a range from about 5 weight percent to about 40 weight percent of the first layer.

15. The method of claim 12, wherein subjecting the first semiconductor layer to at least the first annealing act comprises subjecting the first semiconductor layer to a temperature in a range from about 300 degrees Celsius through about 700 degrees Celsius.

16. A method for forming a semiconductor device comprising:

providing a first semiconductor layer having a first major surface and a trench structure disposed within the first semiconductor layer extending from the first the major surface into the first semiconductor layer, wherein the trench structure comprises an isolating layer along a first wall, a bottom surface, and an opposite second wall, and a conductive layer disposed within the trench structure between the first wall and the second wall;

forming a first layer in an overlying position with respect to the first major surface and the trench structure, wherein the first layer comprises a first metal and a second metal, and wherein the first layer overlies the conductive layer and the isolating layer;

forming a second layer adjacent to the first layer comprising a material constructed to scavenge semiconductor material migrating from the first semiconductor layer during annealing;

subjecting the first semiconductor layer to at least a first annealing act whereby the first layer reacts with the first semiconductor layer to form a Schottky barrier structure and the conductive layer to form a conductive structure; and

removing at least a portion of any unreacted portion of the first layer, wherein an opening is thereby formed to expose the isolating layer proximate to the first wall of the trench structure and between the Schottky barrier structure and the conductive structure.

17. The method of claim 16, wherein:

forming the first layer comprising forming the first layer comprising at least nickel and platinum on the first semiconductor layer comprising silicon; and

forming the second layer comprises forming the second layer comprising titanium.

18. The method of claim 17, wherein forming the first layer comprises forming the first layer where the nickel is in a range from about 60 weight percent to about 95 weight percent of the first layer and where the platinum is in a range from about 5 weight percent to about 40 weight percent of the first layer.

19. The method of claim 17, wherein forming the first layer comprises forming the first layer having a thickness in a range from about 100 Angstroms through about 1,500 Angstroms.

20. The method of claim 16, wherein subjecting the first semiconductor layer to at least the first annealing act comprises subjecting the first semiconductor layer to a temperature in a range from about 300 degrees Celsius through about 700 degrees Celsius.