Semiconductor device and manufacturing method of the same

• US 10,211,332 B2
• Filed: 12/01/2017
• Issued: 02/19/2019
• Est. Priority Date: 05/20/2005
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Nakazawa, Yoshito, Yatsuda, Yuji
• Primary Examiner(s): Everhart, Caridad
• Assistant Examiner(s): Singal, Ankush
• Application Number:
  US15/829,046
• Publication Number:
  US 20180090610A1
• Time in Patent Office: 445 Days
• CPC Class Codes: H01L 21/28008 Making conductor-insulator-semiconductor electrodes
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/4916 the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66484 with multiple gate, at least one gate being an insulated gate H01L29/66742 takes precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7808 the other device being a breakdown diode, e.g. Zener diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device including a field-effect transistor having source and drain source regions, first and second gate electrodes and a protective diode connected to the transistor. The first gate electrode is formed over a first gate insulating film in a lower part of a trench. The second gate electrode is formed over a second gate insulating film in an upper part of the trench. The first gate electrode includes a first polysilicon film, and the second gate electrode includes a second polysilicon film, wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

Claims

1. A semiconductor device including a semiconductor chip, the semiconductor chip comprising:

a field-effect transistor including a drain region, a source region, a first gate electrode and a second gate electrode; and

a protective diode,

wherein the source region is electrically connected to one electrode of the protective diode,

wherein the second gate electrode is electrically connected to the other electrode of the protective diode,

wherein a trench is formed in a semiconductor substrate,

wherein a first gate insulating film is formed in the trench and disposed at a lower part of the trench,

wherein the first gate electrode is formed over the first gate insulating film in the trench and disposed at the lower part of the trench,

wherein a second gate insulating film is formed in the trench and disposed at an upper part of the trench,

wherein the second gate electrode is formed over the second gate insulating film in the trench and disposed at the upper part of the trench,

wherein the first gate electrode includes a first polysilicon film,

wherein the second gate electrode includes a second polysilicon film, and

wherein an impurity concentration of the first polysilicon film is lower than an impurity concentration of the second polysilicon film.

2. A semiconductor device according to the claim 1,

wherein a thickness of the first gate insulating film is thicker than a thickness of the second gate insulating film.

3. A semiconductor device according to the claim 2,

wherein each of the first gate electrode and the protective diode includes the first polysilicon film.

4. A semiconductor device according to the claim 3,

wherein the protective diode is located outside of the trench.

5. A semiconductor device according to the claim 4,

wherein the first polysilicon film is formed of an n-type polysilicon material,

wherein the second polysilicon film is formed of the n-type polysilicon material, and

wherein the protective diode includes an n-type impurity region and a p-type impurity region.

6. A semiconductor device according to the claim 5,

wherein the source region is formed of the n-type semiconductor material, is formed in the semiconductor substrate and is formed near the upper part of the trench, and

wherein the drain region is formed of the n-type semiconductor material, is formed in the semiconductor substrate and is formed near the lower part of the trench.

7. A semiconductor device according to the claim 1,

wherein a first lead-out part of the first gate electrode is formed in an outer peripheral portion of the trench and is electrically connected to the first gate electrode, and

wherein a second lead-out part of the second gate electrode is formed in the outer peripheral portion of the trench and is electrically connected to the second gate electrode.

8. A semiconductor device according to the claim 7,

wherein a thickness of the first lead-out part is smaller than a thickness of the second lead-out part.

9. A semiconductor device according to the claim 1,

wherein the first gate electrode and the second gate electrode are electrically connected to the same potential.

10. A semiconductor device according to the claim 1,

wherein the first gate electrode and the second gate electrode are electrically connected to a different potential from one another, and

wherein the first gate electrode and the source region are electrically connected to the same potential.

11. A semiconductor device according to the claim 1,

wherein a conductivity type of the first polysilicon film is n-type, and

wherein a conductivity type of the second polysilicon film is n-type.

12. A semiconductor device according to the claim 11,

wherein a conductivity type of the drain region is n-type,

wherein a conductivity type of the channel region is p-type, and

wherein a conductivity type of the source region is n-type.